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Hardware Design and Implementation

  • Hani Saleh
  • Nourhan Bayasi
  • Baker Mohammad
  • Mohammed Ismail
Chapter
Part of the Analog Circuits and Signal Processing book series (ACSP)

Abstract

The chapter introduces the hardware design of an automated system for prediction and detection of cardiac arrhythmias especially VT/VF. The system’s architecture is presented, the preprocessing stage is explained, then the system control scheme is introduced, and next the specifics for the realization of the QRS complex, the P and T wave signal delineation, and the classification systems are presented. The chapter is concluded by listing the ASIC implementation results of the given system in 65-nm GlobalFoundries process.

Keywords

Hardware implementation ASIC implementation 65 nm Testbench Simulation Finite-State Machine (FSM) Synthesis Floor Plan, Place and Route and Chip Finishing 

Bibliography

  1. 64.
    J. Pan, W.J. Tompkins, A real-time QRS detection algorithm. IEEE Trans. Biomed. Eng. 32(3), 230–236 (1985)CrossRefGoogle Scholar
  2. 74.
    N. Thakor, J. Webster, W. Tompkins, Optimal qrs detector. Med. Biol. Eng. Comput. 21(3), 343–350 (1983)CrossRefGoogle Scholar

Copyright information

© Springer International Publishing AG 2018

Authors and Affiliations

  • Hani Saleh
    • 1
  • Nourhan Bayasi
    • 2
  • Baker Mohammad
    • 1
  • Mohammed Ismail
    • 3
  1. 1.Department of Electronic EngineeringKhalifa University of Science, Technology and ResearchAbu DhabiUnited Arab Emirates
  2. 2.Department of Electrical and Computer EngineeringKhalifa University of Science, Technology and ResearchAbu DhabiUnited Arab Emirates
  3. 3.Department of Electrical and Computer Engineering DepartmentKhalifa University of Science, Technology and ResearchAbu DhabiUnited Arab Emirates

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