Abstract
To conclude, we give an introduction to the low-power and high-performance ADC in Chap. 1. In the following chapters, we focus on the state-of-the-art ADCs and design considerations. Successful architecture, circuit block, and calibration make up an ADC. Chapter 2 presents architectures for the ADC. From Chaps. 3, 4 and 5, we illustrate the reference buffer design, the amplification design, and the comparator design. We do not only analyze how to relax the requirements of those circuit blocks in the architecture level, but also depict the modification in the circuit level. The calibration techniques for different architectures are talked about in Chap. 6. By using techniques in the previous chapters, one design case is presented in Chap. 7. In the final chapter, we review the book and look into challenges in the future.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
C.C. Abhijit Athavale, High-speed serial i/o made simple: a designer’s guide with fpga applications. Xilinx Connectivity Solutions, PN0402399, (2005)
M.J. e.a., D.R. Stauffer, High Speed Serdes Devices and Applications, (Springer US, 2009)
C. Moy, J. Palicot, Software radio: a catalyst for wireless innovation. IEEE Commun. Mag. 53, 24–30 (2015)
A.M.A. Ali, H. Dinc, P. Bhoraskar, S. Puckett, A. Morgan, N. Zhu, Q. Yu, C. Dillon, B. Gray, J. Lanford, M. McShea, U. Mehta, S. Bardsley, P. Derounian, R. Bunch, R. Moore, G. Taylor, A 14-bit 2.5gs/s and 5gs/s rf sampling adc with background calibration and dither, in 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) (June 2016), pp. 1–2
A.M.A. Ali, H. Dinc, P. Bhoraskar, C. Dillon, S. Puckett, B. Gray, C. Speir, J. Lanford, J. Brunsilius, P.R. Derounian, B. Jeffries, U. Mehta, M. McShea, R. Stop, A 14 bit 1 gs/s rf sampling pipelined adc with background calibration. IEEE J. Solid-State Circuits 49, 2857–2867 (2014)
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2018 Springer International Publishing AG
About this chapter
Cite this chapter
Li, W., Li, F., Wang, Z. (2018). Contributions and Future Directions. In: High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications . Analog Circuits and Signal Processing. Springer, Cham. https://doi.org/10.1007/978-3-319-62012-1_8
Download citation
DOI: https://doi.org/10.1007/978-3-319-62012-1_8
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-62011-4
Online ISBN: 978-3-319-62012-1
eBook Packages: EngineeringEngineering (R0)