Energy-Efficient Hardware Design for Video Systems
The techniques based in the software layer for computation- and power-efficient video processing system given in Chap. 4 do not necessitate any custom hardware. However, custom hardware architectures for video processing systems are in wide use because they produce higher throughput and have higher complexity and power reduction potential compared to the software-only solutions. This chapter outlines some of the hardware architectural enhancements and custom accelerators for highly efficient video processing systems. Efficient I/O and internode communication s for video processing system are discussed. Hardware architectures of the complete system and accelerator s are also given, specifically pertaining to H.264/AVC and HEVC encoders. Furthermore, the hardware accelerator allocation or workload administration (whereby the accelerator provides its services to multiple nodes) is also discussed, which can be useful in shared hardware accelerator paradigms. Targeting the memory subsystem, power-efficient hybrid memory architectures and SRAM aging mitigation are also presented.
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