Abstract
Personalized healthcare solutions are pushing the boundaries for low-power and low-cost sensor readout devices. However, achieving this requirement requires a trade-off between cost, power consumption and accuracy or the dynamic range capability of these devices. In this paper, we outline the main reasons for this trade-off and present existing solutions in literature. In specific, we identify time-domain operation as one of the promising techniques to overcome this trade-off. We present the state-of-art architectures based on time-based operation and discuss their challenges in designing for low-power, low-cost biomedical sensor readout. Furthermore, we propose and discuss a time-based readout design that can overcome these challenges.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Notes
- 1.
To be exact, the model and the following analysis hold true for sampled systems such as sample-and-hold circuits, ADCs. It does not hold true for some blocks such as instrumentation amplifiers (IA) and low-noise amplifiers (LNA). However, since almost any analog signal chain will contain ADCs, the overall conclusion of the analysis will still be applicable and relevant to our discussion in this paper.
- 2.
K f has been extracted from the BSIM4 spice model parameters.
References
Patel, S., Hyung, P., Bonato, P., Chan, L., Rodgers, M.: A review of wearable sensors and systems with application in rehabilitation. J. NeuroEng. Rehabil. 9(1), 1 (2012)
Blaauw, D. et al.: Iot Design Space Challenges: Circuits and Systems. VLSI-Technology, Honolulu (2014)
Penders, J., van Hoof, C., Gyselinckx, B.: Bio-Medical Application of WBAN: Trends and Examples. pp. 279–302. Bio-Medical CMOS ICs, Boston (2011)
Islam, A.B., Islam, S.K., Rahman, T.: A vertically aligned carbon nanofiber (VACNF) based amperometric glucose sensor. 2009 International Semiconductor Device Research Symposium, College Park (2009)
Islam, M.Z., Haider, M.R., Huque, M.A., Adeeb, M.A., Rahman, S., Islam, S.K.: A low power sensor signal processing circuit for implantable biosensor applications. Smart Mater. Struct. 16(2), 525 (2007)
Baker, D.A., Gough, D.A.: A continuous, implantable lactate sensor. Anal. Chem. 67(9), 1536–1540 (1995)
Jeevarajan, A.S., Vani, S., Taylor, T.D., Anderson, M.M.: Continuous pH monitoring in a perfused bioreactor system using an optical pH sensor. Biotechnol. Bioeng. 78(4), 467–472 (2002)
Helleputte, N.V., Konijnenburg, M., Hyejung, K., Pettine, J., Jee, D.-W., Breeschoten, A., Morgado, A., Torfs, T., Groot, H.D., Hoof, C.V., Yazicioglu, R.F.: A multi-parameter signal-acquisition SoC for. 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), San Fransisco (2014)
Bult, K.: The effect of technology scaling on power dissipation in analog circuits. Analog Circuit Design: RF Circuits: Wide band, Front-Ends, DAC’s, Design Methodology and Verification for RF and Mixed-Signal Systems, Low Power and Low Voltage, pp. 51–294. Springer, Dordrecht (2006)
Annema, A.J., Nauta, B., Langevelde, R.V., Tuinhout, H.: Analog circuits in ultra-deep-submicron CMOS. IEEE J. Solid State Circuits. 40(1), 132–143 (2005)
Annema, A.J.: Analog circuit performance and process scaling. IEEE Trans. Circuits Syst. II, Analog. Digit. Signal Process. 46(6), 711–725 (1999)
Lee, K., et al.: The impact of semiconductor technology scaling on CMOS RF and digital circuits for wireless application. IEEE Trans. Electron Devices. 52(7), 1415–1422 (2005)
Baschirotto, A., Chironi, V., Cocciolo, G., D’Amico, S., De Matteis, M., Delizia, P.: Low power analog design in scaled technologies. Proc. Topical Workshop Electron. Particle Phys.,pp. 103–110, (2009)
Murmann, B.: A/D converter trends: power dissipation, scaling and digitally assisted architectures. 2008 IEEE Custom Integrated Circuits Conference, San Jose (2008)
Enz, C.C., Vittoz, E.A.: Chapter 1.2 Cmos Low-Power Analog Circuit Design. (2001)
Murmann, B., Nikaeen, P., Connelly, D., Dutton, R.: Impact of scaling on analog performance and associated modeling needs. IEEE Trans. Electron Devices. 53(9), 160–2167 (2006)
Razavi, B.: Design of Analog CMOS Integrated Circuits. McGraw-Hill, New York (2001)
Bult, K., Geelen, G.J.: The CMOS gain-boosting technique. Analog Integr. Circ. Sig. Process. 1(2), 118–135 (1991)
Chatterjee, S., Tsividis, Y., Kinget, P.: 0.5-V analog circuit techniques and their application in OTA and filter design. IEEE J. Solid State Circuits. 40(12), 2373–2387 (2005)
Lehmann, T., Cassia, M.: 1-V power supply CMOS cascode amplifier. IEEE J. Solid State Circuits. 36(7), 1082–1086 (2001)
Stockstad, T., Yoshizawa, H.: A 0.9 V, 0.51 μA rail-to-rail CMOS operational amplifier. IEEE J. Solid State Circuits. 37(3), 286–292 (2002)
Wang, R., Harjani, R.: Partial positive feedback for gain enhancement of low-power CMOS OTAs. Low-Voltage Low-Power Analog Integrated Circuits: A Special Issue of Analog Integrated Circuits and Signal Processing An International Journal 8(1) (1995), Boston, Springer US, pp. 21–35 (1995)
Drost, B., Talegaonkar, M., Hanumolu, P.K.: Analog filter design using ring oscillator integrators. IEEE J. Solid State Circuits. 47(12), 3120–3129 (2012)
Park, M., Perott, M.H.: IEEE J. Solid State Circuits. 44(12), 3344–3358 (2009)
Mohan, R., Yan, L.L., Gielen, G., Hoof, C., Yazicioglu, R.: 0.35 V time-domain-based instrumentation amplifier. Electron. Lett. 50(21), 1513–1514 (2014)
Enz, C., Temes, G.: Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization. Proc. IEEE. 84(11), 1584–1614 (1996)
Wu, R., Makinwa, K.K.A.A., Huijsing, J.: A chopper current-feedback instrumentation amplifier with a 1 mHz 1/f noise corner and an AC-coupled ripple reduction loop. IEEE J. Solid State Circuits. 44(12), 3232–3243 (2009)
Akita, I., Ishida, M.: A chopper-stabilized instrumentation amplifier using area-efficient self-trimming technique. Analog Integr. Circ. Sig. Process. 81(3), 571–582 (2014)
Tang, A.: A 3 /spl mu/V-offset operational amplifier with 20 nV//spl radic/Hz input noise PSD at DC employing both chopping and autozeroing. 2002 IEEE International Solid-State Circuits Conference, San Fransisco (2002)
Pertijs, M., Kindt, W.: A 140 dB-CMRR current-feedback instrumentation amplifier employing ping-pong auto-zeroing and chopping. IEEE J. Solid State Circuits. 45(10), 2044–2056 (2010)
Mohan, R., Zaliasl, S.G.G.G., Hoof, C., Yazicioglu, R., Helleputte, N.: A 0.6-V, 0.015-mm2, time-based ECG readout for ambulatory applications in 40-nm CMOS. IEEE J. Solid State Circuits. 52(1), 298–308 (2017)
Mesgarani, A., Alam, M., Nelson, F., Ay, S.: Supply boosting technique for designing very low-voltage mixed-signal circuits in standard CMOS. 2010 53rd IEEE International Midwest Symposium on Circuits and Systems, Seattle (2010)
Abo, A., Gray, P.P.R.: A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter. IEEE J. Solid State Circuits. 34(5), 599–606 (1999)
Ranuarez, J., Deen, M., Chen, C.-H.: A review of gate tunneling current in MOS devices. Microelectron. Reliab. 46(12), 1939–1956 (2006)
Helleputte, N.V., Kim, S., Kim, H., Kim, J.P., Hoof, C.V., Yazicioglu, R.F.: A 160uA biopotential acquisition IC with fully Integrated IA and motion artifact suppression. IEEE Trans. Biomed. Circuits Syst. 6(6), 552–561 (2012)
Muller, R., Gambini, S.S., Rabaey, J.: A 0.013 mm2, 5uW , DC-coupled neural signal acquisition IC With 0.5 V supply. IEEE J. Solid State Circuits. 47(1), 232–243 (2012)
Tsividis, Y., Banu, M., Khoury, J.: Continuous-time MOSFET-C filters in VLSI. IEEE J. Solid State Circuits. SC-1(1), 15–30 (1986)
Helleputte, N.V., et al.: A 345 μW multi-sensor biomedical SoC with bio-impedance, 3-channel ECG, motion artifact reduction, and Integrated DSP. IEEE J. Solid State Circuits. 50(1), 230–244 (2015)
Fan, Q., Sebastiano, F., Huijsing, J.H., Makinwa, K.A.: A 1.8 W 60 nV Hz capacitively-coupled chopper instrumentation amplifier in 65nm CMOS for wireless sensor nodes. IEEE J. Solid State Circuits. 46(7), 1534–1543 (2011)
Ng, K., Xu, Y.: A compact, low input capacitance neural recording amplifier with Cin/Gain of 20fF.V/V. 2012 IEEE Biomedical Circuits and Systems Conference (BioCAS), Hsinchu (2012)
Bohorquez, J.L., Yip, M., Chandrakasan, A.P., Dawson, J.L.: A biomedical sensor interface with a sinc filter and interference cancellation. IEEE J. Solid State Circuits. 46(4), 746–756 (2011)
Zou, X., Liew, S., Yao, L., Lian, Y.: A 1V 22μW 32-channel implantable EEG recording IC. 2010 IEEE International Solid-State Circuits Conference, San Fransisco (2010)
Majidzadeh, V., Schmid, A., Leblebici, Y.: Energy efficient low-noise neural recording amplifier with enhanced noise efficiency factor. IEEE Trans. Biomed. Circuits Syst. 5(3), 262–271 (2011)
Naraghi, S., Courcy, M., Flynn, M.P.: A 9-bit, 14 μW and 0.06 mm pulse position modulation ADC in 90nm digital CMOS. IEEE J. Solid-State Circuits. 45(9), 1870 (2010)
Hernandez, L., Prefasi, E.: Analog-to-digital conversion using noise shaping and time encoding. IEEE Trans. Circuits Syst. I, Reg. Papers. 55(7), 2026–2037 (2008)
Dhanasekaran, V., et al.: A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element. 2009 IEEE International Solid-State Circuits Conference, San Fransisco (2009)
Iwata, A., Sakimura, N., Nagata, M., Morie, T.: The architecture of delta sigma analog-to-digital converters using a voltage-controlled oscillator as a multibit quantizer. IEEE Trans. Circuits Syst. II, Analog Digit Signal Process. 46(7), 941–945 (1999)
Kuppambatti, J., Vigraham, B., Kinget, P.: 17.9 A 0.6V 70MHz 4th-order continuous-time butterworth filter with 55.8dB SNR, 60dB THD at +2.8dBm output signal power. 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers, San Fransisco (2014)
Cuk, S.M.: Modeling, Analysis and Design. Thesis – California Institute of Technology, Pasadena (1977)
Hanson, S., Foo, Z., Blaauw, D., Sylvester, D.: 0.5 V sub-microwatt CMOS image sensor with pulse-width modulation read-out. IEEE J. Solid State Circuits. 45(4), 759–767 (2010)
Jung, W., Jeong, S., Oh, S., Sylvester, D., Blaauw, D.: 27.6 A 0.7pF-to-10nF fully digital capacitance-to-digital converter using iterative delay-chain discharge. 2015 IEEE International Solid-State Circuits Conference, San Fransisco (2015)
Rethy, J., Smedt, V., Dehaene, W., Gielen, G.: Supply-noise-resilient design of a BBPLL-based force-balanced Wheatstone bridge Interface in 130-nm CMOS. IEEE J. Solid State Circuits. 48(11), 618–627 (2013)
Yurish, S.: Sensors and transducers: frequency output vs voltage output. Sens. Transducers Mag. 49(11), 302–305 (2004)
Middlehoek, S., French, P., Huijsing, J., Lian, W.: Sensors with digital or frequency output. Sensors Actuators. 15(2), 119–133 (1988)
Kindlund, A., Sundgren, H., Lundstrom, I.: Quartz crystal gas monitor with a gas concentrating stage. Sensors Actuators. 6(1), 1–17 (1984)
Danneels, H., Coddens, K., Gielen, G.: A fully-digital, 0.3V, 270 nW capacitive sensor interface without external references. 2011 Proceedings of the ESSCIRC (ESSCIRC), Helsinki (2011)
Grassi, M., Malcovati, P., Baschirotto, A.: A 141-dB dynamic range CMOS gas-sensor interface circuit without calibration with 16-bit digital output word. IEEE J. Solid State Circuits. 42(7), 1543–1554 (2007)
Lu, J.H.-L., Inerowicz, M., Joo, S., Kwon, J.-K., Jung, B.: A low-power, wide-dynamic-range semi-digital universal sensor readout circuit using pulsewidth modulation. IEEE Sensors J. 11(5), 1134–1144 (2011)
Rethy, J.V., Danneels, H., Smedt, V.D., Dehaene, W., Gielen, G.E.: Supply-noise-resilient design of a BBPLL-based force-balanced wheatstone bridge interface in 130nm CMOS. IEEE J. Solid Stage Circuits. 48(11), 2618–2627 (2013)
Park, M., Perrott, M.: A VCO-based analog-to-digital converter with second-order Sigma-Delta noise shaping. 2009 IEEE International Symposium on Circuits and Systems, Taipei (2009)
Jiang, W., Hokhikyan, V., Chandrakumar, H., Karkare, V., Markovic, D.: 28.6 A +−50mV linear input-range VCO-based neural-recording front-end with digital non-linearity correction. 2016 IEEE International Solid-State Circuits Conference, San Fransisco (2016)
Booton, R.: Nonlinear control systems with random inputs. IRE Trans. Circ. Theory. 1(1), 9–18 (1954)
Ouzounov, S., Hegt, H., Roermund, A.V.: Sigma–delta modulators operating at a limit cycle. IEEE Trans. Circuits Syst. II. 53(5), 399–403 (2006)
Perrott, M., Trott, M., Sodini, C.: A modeling approach for Σ-Δ fractional-N frequency synthesizers allowing straightforward noise analysis. IEEE J. Solid State Circuits. 37(8), 1028–1038 (2002)
Goldberger, A., et al.: PhysioBank, PhysioToolkit, and PhysioNet: components of a new research resource for complex physiologic signals. Circulation. 101, e215–e220 (2000)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2018 Springer International Publishing AG
About this chapter
Cite this chapter
Mohan, R., Zaliasl, S., Van Hoof, C., Van Helleputte, N. (2018). Time-Based Biomedical Readout in Ultra-Low-Voltage, Small-Scale CMOS Technology. In: Harpe, P., Makinwa, K., Baschirotto, A. (eds) Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V & Advanced Node Analog Circuit Design. Springer, Cham. https://doi.org/10.1007/978-3-319-61285-0_17
Download citation
DOI: https://doi.org/10.1007/978-3-319-61285-0_17
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-61284-3
Online ISBN: 978-3-319-61285-0
eBook Packages: EngineeringEngineering (R0)