Abstract
The low-complexity encoding and decoding algorithms render polar codes attractive for use in SDR applications where computational resources are limited. In this chapter, we present low-latency software polar decoders that exploit modern processor capabilities. We show how adapting the algorithm at various levels can lead to significant improvements in latency and throughput , yielding polar decoders that are suitable for high-performance SDR applications on modern desktop processors and embedded-platform processors . These proposed decoders have an order of magnitude lower latency and memory footprint compared to state-of-the-art decoders, while maintaining comparable throughput . In addition, we present strategies and results for implementing polar decoders on graphical processing units . Finally, we show that the energy efficiency of the proposed decoders is comparable to state-of-the-art software polar decoders.
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Notes
- 1.
As stated above, compiler auto-vectorization is always kept enabled.
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Giard, P., Thibeault, C., Gross, W.J. (2017). Low-Latency Software Polar Decoders. In: High-Speed Decoders for Polar Codes. Springer, Cham. https://doi.org/10.1007/978-3-319-59782-9_3
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DOI: https://doi.org/10.1007/978-3-319-59782-9_3
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