Abstract
Current designs invariably have both the digital and analog components within a block and also at SoC level. Without correct verification of analog voltage levels to digital binary and vice versa, the design will be dead on arrival. This chapter will go into high level discussion of major challenges and solutions, the current state of affair, analog model abstraction levels, real number modeling, SystemVerilog Assertions-based methodology, etc
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Mehta, A.B. (2018). Analog/Mixed Signal (AMS) Verification. In: ASIC/SoC Functional Design Verification. Springer, Cham. https://doi.org/10.1007/978-3-319-59418-7_13
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DOI: https://doi.org/10.1007/978-3-319-59418-7_13
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