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Hardware/Software Co-verification

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ASIC/SoC Functional Design Verification
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Abstract

An SoC is ready only when both its hardware and software components are ready. You cannot ship silicon until its software is ready because without software, hardware is pretty useless. This chapter will discuss the methodologies to develop software such that it is ready when hardware is ready to ship. What kind of platform do you need? How does ESL virtual platform play a key role? How do emulators and accelerators fit in the methodology equation?

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Mehta, A.B. (2018). Hardware/Software Co-verification. In: ASIC/SoC Functional Design Verification. Springer, Cham. https://doi.org/10.1007/978-3-319-59418-7_12

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  • DOI: https://doi.org/10.1007/978-3-319-59418-7_12

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-59417-0

  • Online ISBN: 978-3-319-59418-7

  • eBook Packages: EngineeringEngineering (R0)

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