Skip to main content
SpringerLink
Log in

Scheduling Tasks in Embedded Systems Based on NoC Architecture Using Simulated Annealing

  • Conference paper
  • First Online:
Advances in Dependability Engineering of Complex Systems (DepCoS-RELCOMEX 2017)

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 582))

Included in the following conference series:

Abstract

This paper presents a new method to generate and schedule tasks in the architecture of embedded systems based on the simulated annealing. This novel method takes into account the attribute of divisibility of tasks. The paper describes methods in the following chapters in order to generate target system with established restrictions (deadlines). The research activities are an extension of the research presented in the article [1]. As in the case of said work studies, in researches the same algorithms was used for each considered case. Previous studies have indicated very promising results after applying the attribute of divisibility for tasks represented in the created systems.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Dorota, D.: Scheduling tasks in embedded systems based on NoC architecture. Int. J. Comput. Technol. Appl. 5, 1909–1916 (2014)

    Google Scholar 

  2. Dick, R.P., Rhodes, D.L., Wolf, W.: TGFF: task graphs for free. In: Proceedings of the 6th International Workshop on Hardware/Software Codesign. IEEE Computer Society (1998)

    Google Scholar 

  3. Dick, R., Rhodes, D.: TGFF. http://ziyang.eecs.umich.edu/~dickrp/tgff/. (Accessed Dec 2016)

  4. Kopetz, H.: Real-time Systems: Design Principles for Distributed Embedded Applications. Springer (2011)

    Google Scholar 

  5. Lee, E.A., Seshia, S.A.: Introduction to Embedded Systems: A Cyber-physical Systems Approach. Lee & Seshia, Berkeley (2011)

    Google Scholar 

  6. Rajesh, K.G.: Co-synthesis of hardware and software for digital embedded systems, Ph.D. thesis, 10 December 1993

    Google Scholar 

  7. Ost, L., Mandelli, M., Almeida, G.M., Moller, L., Indrusiak, L.S., Sassatelli, G., Moraes, F.: Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach. ACM Trans. Embed. Comput. Syst. (TECS) 12(3), 75 (2013)

    Google Scholar 

  8. Oh, H., Ha, S.: Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints. In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, pp. 133–138. ACM (2002)

    Google Scholar 

  9. Strachacki M.: Projektowanie i optymalizacja sprzętowo-programowych wbudowanych systemów przetwarzania danych, Ph.D. thesis, Gdańsk, February 2008

    Google Scholar 

  10. Khan, G.N., Iniewski, K. (eds.).: Embedded and Networking Systems: Design, Software, and Implementation. CRC Press (2013)

    Google Scholar 

  11. Eles, P., Peng, Z., Kuchcinski, K., Doboli, A.: System level hardware/software partitioning based on simulated annealing and tabu search. Des. Autom. Embed. Syst. 2(1), 5–32 (1997)

    Article  Google Scholar 

  12. Henkel, J., Ernst, R., Holtmann, U., Benner, T.: Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis. In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, pp. 96–100. IEEE Computer Society Press, November 1994

    Google Scholar 

  13. O’Connor, I., Nicolescu, G. (eds.).: Integrated Optical Interconnect Architectures for Embedded Systems. Springer 2013

    Google Scholar 

  14. Wettin, P., Murray, J., Kim, R., Yu, X., Pande, P.P., Heo, D.: Performance evaluation of wireless NoCs in presence of irregular network routing strategies. In: Design, Automation and Test in Europe Conference and Exhibition (DATE), pp. 1–6. IEEE (2014)

    Google Scholar 

  15. Dick, R.P., Jha, N.K.: MOGAC: a multiobjective genetic algorithm for hardware-software cosynthesis of distributed embedded systems. IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 17(10), 920–935 (1998)

    Article  Google Scholar 

  16. Chinneck, J.W.: Practical Optimization: a Gentle Introduction, Lecture Notes, Systems and Computer Engineering, Ph.D. thesis, Carleton University, Ottawa, Canada, 12 December 2010

    Google Scholar 

  17. Kirkpatrick, S., Gelatt, C.D., Vecchi, M.P.: Optimization by simulated annealing. Sci. New Ser. 220(4598), 671–680 (1983)

    MathSciNet  MATH  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Cracow University of Technology, Krakow, Poland

    Dariusz Dorota

Authors
  1. Dariusz Dorota
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Dariusz Dorota .

Editor information

Editors and Affiliations

  1. Department of Computer Engineering, Wrocław University of Technology Department of Computer Engineering, Wrocław, Poland

    Wojciech Zamojski

  2. Department of Computer Engineering, Wrocław University of Technology Department of Computer Engineering, Wrocław, Poland

    Jacek Mazurkiewicz

  3. Department of Computer Engineering, Wrocław University of Technology, Wroclaw, Poland

    Jarosław Sugier

  4. Department of Computer Engineering, Wrocław University of Technology Department of Computer Engineering, Wrocław, Poland

    Tomasz Walkowiak

  5. Systems Research Institute, Polish Academy of Sciences Systems Research Institute, Warsaw, Poland

    Janusz Kacprzyk

Rights and permissions

Reprints and permissions

Copyright information

© 2018 Springer International Publishing AG

About this paper

Cite this paper

Dorota, D. (2018). Scheduling Tasks in Embedded Systems Based on NoC Architecture Using Simulated Annealing. In: Zamojski, W., Mazurkiewicz, J., Sugier, J., Walkowiak, T., Kacprzyk, J. (eds) Advances in Dependability Engineering of Complex Systems. DepCoS-RELCOMEX 2017. Advances in Intelligent Systems and Computing, vol 582. Springer, Cham. https://doi.org/10.1007/978-3-319-59415-6_13

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-59415-6_13

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-59414-9

  • Online ISBN: 978-3-319-59415-6

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics

Search

Navigation