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Overview of Embedded Flash Memory Technology

  • Takashi KonoEmail author
  • Tomoya Saito
  • Tadaaki Yamauchi
Chapter
Part of the Integrated Circuits and Systems book series (ICIR)

Abstract

This chapter is dedicated to comprehensively survey representative embedded flash-memory technologies from the memory-cell level to the system level. First, various types of embedded flash-memory cells are briefly overviewed in terms of cell structure, operation principle, and features in terms of characteristics and reliability . Then presented are the basic circuit-design techniques required in embedded flash hard macros under different design constraints from stand-alone flash memories. In addition, system-level design, which plays important roles for function enhancement to meet a wide range of requirements, is also covered. Finally, future prospects of eFlash-memory technologies are briefly summarized.

References

  1. 1.
    K. Baker, Embedded nonvolatile memory technology. in Proceedings of IEEE International Conference on IC Design & Technology, pp. 185–189 (2009)Google Scholar
  2. 2.
    S. Kianian, A. Levi, D. Lee, Y.-W. Hu, A novel 3 volts-only, small sector erase, high density flash E2PROM. in Symposium on VLSI Technology, Digest of Technical papers, pp. 71–72 (1994)Google Scholar
  3. 3.
    Y.K. Lee, J.H. Moon, Y.H. Kim, M.-J. Chun, S.-Y. Ha, S. Choi, H. Yoo, H. Jeon, J. Yu, J.-U. Han, E. Jung, C. Chung, 2T-FN eNVM with 90 nm logic process for smart card. in Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, pp. 26–27 (2008)Google Scholar
  4. 4.
    K.-D. Suh, B.-H. Suh, Y.-H. Lim, J.-K. Kim, Y.-J. Choi, Y.-N. Koh, S.-S. Lee, S.-C. Kwon, B.-S. Choi, J.-S. Yum, J.-H. Choi, J.-R. Kim, H.-K. Lim, A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme. in IEEE Solid-State Circuits Conference, Digest of Technical Papers, pp. 128–129 (1995)Google Scholar
  5. 5.
    F. Piazza, C. Boccaccio, S. Bruyere, R. Cea, B. Clark, N. Degors, C. Collins, A. Gandolfo, A. Gilardini, E. Gomiero, P. M. Mans, G. Mastracchio, D. Pacelli, N. Planes, J. Simon, M. Weybright, A. Maurelli, High performance flash memory for 65 nm embedded automotive application. in IEEE International Memory Workshop, pp. 77–79 (2010)Google Scholar
  6. 6.
    H. Kojima, T. Ema, T. Anezaki, J. Ariyoshi, H. Ogawa, K. Yoshizawa, S. Mehta, S. Fong, S. Logie, R. Smoak, D. Rutledge, Embedded flash on 90 nm logic technology & beyond for FPGAs. in IEEE International Electron Devices Meeting, pp. 677–680 (2007)Google Scholar
  7. 7.
    M. Kamiya, Y. Kojima, Y. Kato, K. Tanaka, Y. Hayashi, EPROM cell with high gate injection efficiency. in IEEE International Electron Devices Meeting, pp. 741–744 (1982)Google Scholar
  8. 8.
    R. Mih, J. Harrington, K. Houlihan, H.K. Lee, K. Chan, J. Johnson, B. Chen, J. Yan, A. Schmidt, C. Gruensfelder, K. Kim, D. Shum, C. Lo, D. Lee, A. Levi, C. Lam, 0.18 µm modular triple self-aligned embedded split-gate flash memory. in Symposium on VLSI Technology, Digest of Technical papers, pp. 120–121 (2000)Google Scholar
  9. 9.
    D. Shum, J.R. Power, R. Ullmann, E. Suryaputra, K. Ho, J. Hsiao, C.H. Tan, W. Langheinrich, C. Bukethal, V. Pissors, G. Tempel, M. Röhrich, A. Gratz, A. Iserhagen, E.O. Andersen, S. Paprotta, W. Dickenscheid, R. Strenz, R. Duschl, T. Kern, C.T. Hsieh, C.M. Huang, C.W. Ho, H.H. Kuo, C.W. Hung, Y.T. Lin, L.C. Tran, Highly reliable flash memory with self-aligned split-gate cell embedded into high performance 65 nm CMOS for automotive & smartcard applications. in IEEE International Memory Workshop, pp. 139–142 (2012)Google Scholar
  10. 10.
    L.Q. Luo, Y.T. Chow, X.S. Cai, F. Zhang, Z.Q. Teo, D.X. Wang, K.Y. Lim, B.B. Zhou, J.Q. Liu, A. Yeo, T.L. Chang, Y.J. Kong, C.W. Yap, S. Lup, R. Long, J.B. Tan, D. Shum, N. Do, J.H. Kim, P. Ghazavi, V. Tiwari, Functionality demonstration of a high-density 1.1 V self-aligned split-gate NVM cell embedded into LP 40 nm CMOS for automotive and smart card applications. in IEEE International Memory Workshop, pp. 165–168 (2015)Google Scholar
  11. 11.
    G. Tao, S. Nath, Experimental study of temperature dependence of program/erase endurance of embedded flash memories with 2T-FNFN NOR device architecture. in IEEE-IRW, pp. 76–79 (2006)Google Scholar
  12. 12.
    A. Conte, G. Matranga, D.D. Costantini, M. Micciche, C. Ucciardello, A.D. Martino, F. Granata, A. Castagna, P. Zuliani, E. Gomiero, R. Annunziata, J. Devin, F. Maugain, J. Acland, J. Sonzogni, A 90 nm embedded page flash for EEPROM replacement in system on chip. in IEEE Non-Volatile Semiconductor Memory Workshop, pp. 28–30 (2008)Google Scholar
  13. 13.
    A. Baiano, M. van Duuren, E. van der Vegt, B. Schippers, R. Beurze, D.T. Mofrad, H. van Zwol, Y. Chen, J. Chiang, H. Lokker, K. van Dijk, J. Verbree, Y.N. Chen, J. Garbe, R. Verhaar, D. Dormans, Junction optimization for embedded 40 nm FN/FN flash memory. in IEEE International Memory Workshop, pp. 173–176 (2015)Google Scholar
  14. 14.
    S.-R. Kim, K.J. Han, K.-S. Lee, R. Li, J. Wolfman, T.-H. Kim, P. Liu, H. Kim, P.-Y. Lee, Y. Wang, Y. Jia, F. Dhaoui, F. Hawley, H.-C. Tseng, High performance 65 nm 2T-embedded Flash memory for high reliability SOC applications. in IEEE International Memory Workshop, pp. 158–160 (2010)Google Scholar
  15. 15.
    S. Minami, Y. Kamigaki, A novel MONOS nonvolatile memory device ensuring 10-year data retention after 107 erase/write cycles. IEEE Trans. Electron Devices 40(11), 2011–2017 (1993)CrossRefGoogle Scholar
  16. 16.
    W.M. Chen, C. Swift, D. Roberts, K. Forbes, J. Higman, B. Maiti, W. Paulson, K.T. Chang, A novel flash memory device with split gate source side injection and ONO charge storage stack (SPIN). in Symposium on VLSI Technology, pp. 63–64 (1997)Google Scholar
  17. 17.
    H.M. Lee, S.T. Woo, H.M. Chen, R. Shen, C. D. Wang, L.C. Hsia, C.C.-H. Hsu, NeoFlash®—true logic single poly flash memory technology. in IEEE Non-Volatile Semiconductor Memory Workshop, pp. 15–16 (2006)Google Scholar
  18. 18.
    M. Janai, B. Eitan, A. Shappir, E. Lusky, I. Bloom, G. Cohen, Data retention reliability model of NROM nonvolatile memory products. IEEE Trans. Device Mater. Reliab. 4(3), 404–415 (2004)CrossRefGoogle Scholar
  19. 19.
    A. Shappir, E. Lusky, G. Cohen, I. Bloom, M. Janai, B. Eitan, The two-bit NROM reliability. IEEE Trans. Device Mater. Reliab. 4(3), 397–403 (2004)CrossRefGoogle Scholar
  20. 20.
    Y. Kawashima, T. Hashimoto, I. Yamakawa, Investigation of the data retention mechanism and modeling for the high reliability embedded split-gate MONOS flash memory. in IEEE International Reliability Physics Symposium, MY.6.1–MY.6.5 (2015)Google Scholar
  21. 21.
    H. Mitani, K. Matsubara, H. Yoshida, T. Hashimoto, H. Yamakoshi, S. Abe, T. Kono, Y. Taito, T. Ito, T. Krafuji, K. Noguchi, H. Hidaka, T. Yamauchi, A 90 nm embedded 1T-MONOS flash macro for automotive applications with 0.07 mJ/8kB rewrite energy and endurance over 100 M cycles under Tj of 175 °C. in IEEE Solid-State Circuits Conference, Digest of Technical Papers, pp. 140–141 (2016)Google Scholar
  22. 22.
    B. Eitan, P. Pavan, I. Bloom, E. Aloni, A. Frommer, D. Finzi, Can NROM, a 2-bit, trapping storage NVN cell, give a real challenge to floating date cells? in International Conference on Solid State Devices and Materials, pp. 522–524 (1999)Google Scholar
  23. 23.
    F. Ito, Y. Kawashima, T. Sakai, Y. Kanamaru, Y. Ishii, M. Mizuno, T. Hashimoto, T. Ishimaru, T. Mine, N. Matsuzaki, H. Kume, T. Tanaka, Y. Shinagawa, T. Toya, K. Okuyama, K. Kuroda, K. Kubota, A novel MNOS technology using gate hole injection in erase operation for embedded nonvolatile memory applications. in Symposium on VLSI Technology, Digest of Technical papers, pp. 80–81 (2004)Google Scholar
  24. 24.
    T. Kono, T. Ito, T. Tsuruda, T. Nishiyama, T. Nagasawa, T. Ogawa, Y. Kawashima, H. Hidaka, T. Yamauchi, 40 nm embedded SG-MONOS flash macros for automotive with 160 MHz random access for code and endurance over 10 M cycles for data. in IEEE Solid-State Circuits Conference, Digest of Technical Papers, pp. 212–213 (2013)Google Scholar
  25. 25.
    Y. Taito, M. Nakano, H. Okimoto, D. Okada, T. Ito, T. Kono, K. Noguchi, H. Hidaka, T. Yamauchi, A 28 nm embedded SG-MONOS flash macro for automotive achieving 200 MHz read operation and 2.0 MB/s write throughput at Tj of 170 °C. in IEEE Solid-State Circuits Conference, Digest of Technical Papers, pp. 132–133 (2015)Google Scholar
  26. 26.
    J.A. Yater, S.T. Kang, R. Steimle, C.M. Hong, B. Winstead, M. Herrick, G. Chindalore, Optimization of 90 nm split gate nanocrystal non-volatile memory. in IEEE Non-Volatile Semiconductor Memory Workshop, pp. 77–78 (2007)Google Scholar
  27. 27.
    S.-T. Kang, B. Winstead, J. Yater, M. Suhail, G. Zhang, C.-M. Hong, H. Gasquet, D. Kolar, J. Shen, B. Min, K. Loiko, A. Hardell, E. LePore, R. Parks, R. Syzdek, S. Williams, W. Malloch, G. Chindalore, Y. Chen, Y. Shao, L. Huajun, L. Louis, S. Chaw, High performance nanocrystal based embedded flash microcontrollers with exceptional endurance and nanocrystal scaling capability. in IEEE International Memory Workshop, pp. 131–134 (2012)Google Scholar
  28. 28.
    K. Ramkumar, I. Kouznetsov, V. Prabhakar, K. Shakeri, X. Yu, Y. Yang, L. Hinh, S. Lee, S. Samanta, H.M. Shih, S. Geha, P.C. Shih, C.C. Huang, H.C. Lee, S.H. Wu, J.H. Gau and Y.K. Sheu, A scalable, low voltage, low cost SONOS memory technology for embedded NVM applications. in IEEE International Memory Workshop, pp. 119–202 (2013)Google Scholar
  29. 29.
    E. Harari, L. Schmitz, B. Troutman, S. Wang, A 256-bit nonvolatile static RAM. in IEEE Solid-State Circuits Conference, Digest of Technical Papers, pp. 108–109 (1978)Google Scholar
  30. 30.
    C.-Y. Lin, C.-H. Lin, C.-H. Ho, W.-W. Liao, S.-Y. Lee, M.-C. Ho, S.-C. Wang, S.-C. Huang, Y.-T. Lin, C.C.-H. Hsu, Embedded OTP fuse in CMOS logic process. in IEEE International Workshop on Memory Technology, Design, and Testing, pp. 13–15 (2005)Google Scholar
  31. 31.
  32. 32.
  33. 33.
    K. Ohsaki, N. Asamoto, S. Takagaki, A single poly EEPROM cell structure for use in standard CMOS processes. IEEE J. Solid-State Circ. 29(3), 311–316 (1994)Google Scholar
  34. 34.
    R.J. McPartland, R. Singh, 1.25 volt, low cost, embedded flash memory for low density applications. in Symposium on VLSI Circuits, Digest of Technical Papers, pp. 158–161 (2000)Google Scholar
  35. 35.
    S.-H. Song, K.C. Chun, C.H. Kim, A logic-compatible embedded flash memory featuring a multi-story high voltage switch and a selective refresh scheme. in Symposium on VLSI Circuits, Digest of Technical Papers, pp. 130–131 (2012)Google Scholar
  36. 36.
    G. Fredeman, D. Plass, A. Mathews, K. Reyer, T. Knips, T. Miller, E. Gerhard, D. Kannambadi, C. Paone, D. Lee, D. Rainey, M. Sperling, M. Whalen, S. Burns, A 14 nm 1.1 Mb embedded DRAM macro with 1 ns access. in IEEE Solid-State Circuits Conference, Digest of Technical Papers, pp. 316–317 (2015)Google Scholar
  37. 37.
    C. Demi, M. Jankowski, C. Thalmaier, A 0.13 µm 2.125 MB 23.5 ns embedded flash with 2 GB/s read throughput for automotive microcontrollers. in IEEE Solid-State Circuits Conference, Digest of Technical Papers, pp. 478–617 (2007)Google Scholar
  38. 38.
    M.-F. Chang, S.-J. Shen, C.-C. Liu, C.-W. Wu, Y.-F. Lin, S.-C. Wu, C.-E. Huang, H.-C. Lai, Y.-C. King, C.-J. Lin, H.-J. Liao, Y.-D. Chih, H. Yamauchi, An offset-tolerant current-sampling-based sense amplifier for sub-100 nA-cell-current nonvolatile memory. in IEEE Solid-State Circuits Conference, Digest of Technical Papers, pp. 206–208 (2011)Google Scholar
  39. 39.
    An example of this scheme is shown in the following web site: http://cache.nxp.com/files/32bit/doc/app_note/AN4282.pdf?fsrch=1&sr=1&pageNum=1. Mar 2015
  40. 40.
    S. Kawai, A. Hosogane, S. Kuge, T. Abe, K. Hashimoto, T. Oishi, N. Tsuji, K. Sakakibara, K. Noguchi, An 8kB EEPROM-emulation DataFLASH module for automotive MCU. in IEEE Solid-State Circuits Conference, Digest of Technical Papers, pp. 508–632 (2008)Google Scholar

Copyright information

© Springer International Publishing AG 2018

Authors and Affiliations

  1. 1.Core Technology Business DivisionRenesas ElectronicsKodaira-shiJapan
  2. 2.Renesas ElectronicsKodaira-shiJapan

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