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Design for Test and Test Equipment Roadmap

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Abstract

This chapter discusses the expected evolution of testability and test equipment capabilities and performances for ICs manufactured on VLSI technologies. A review of the evolution of failures modes across the technology platform is used to evaluate impacts on the requirements for testability and test equipment (ATE). These same elements are also evaluated toward the quality and reliability requirements offered by different market segments. Finally, considerations on costs and economical sustainability on the effect of requirements are reported to the readers.

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Correspondence to Davide Appello .

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Appello, D. (2018). Design for Test and Test Equipment Roadmap. In: Ottavi, M., Gizopoulos, D., Pontarelli, S. (eds) Dependable Multicore Architectures at Nanoscale. Springer, Cham. https://doi.org/10.1007/978-3-319-54422-9_8

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  • DOI: https://doi.org/10.1007/978-3-319-54422-9_8

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-54421-2

  • Online ISBN: 978-3-319-54422-9

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