Abstract
The resistive switching property exhibited by many emerging memory technologies enables the execution of logic operations directly with memory arrays. This opens new horizons to a modern era of computer architectures beyond the traditional Von Neumann architectures which have separated memory and computing units. In this chapter, the memristive behavior of RRAM is abstracted as a majority based logic operation for efficient synthesis of logic-in-memory circuits and systems. A majority based Programmable Logic-in-Memory (PLiM) architecture is also introduced and compiled addressing the latency and area issues.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Notes
References
Amarù, L. G., Gaillardon, P.-E., & De Micheli, G. (2014). Majority-inverter graph: A novel data-structure and algorithms for efficient logic optimization. In DAC (pp. 194:1–194:6).
Amarù, L., Petkovska, A., Gaillardon, P.-E., Bruna, D. N., Ienne, P., & De Micheli, G. (2015a). Majority-inverter graph for FPGA synthesis. In SASIMI.
Amarù, L. G., Gaillardon, P.-E., & De Micheli, G. (2015b). Boolean logic optimization in majority-inverter graphs. In DAC.
Amarù, L. G., Gaillardon, P.-E., & De Micheli, G. (2016). Majority-inverter graph: A new paradigm for logic optimization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 35(5), 806–819.
Beatty, J. C. (1972). An axiomatic approach to code optimization for expressions. Journal of the ACM, 19(4), 613–640.
Birkhoff, G., & Kiss, S. A. (1947). A ternary operation in distributive lattices. Bulletin of the American Mathematical Society, 53(8), 749–752.
Bürger, J., Teuscher, C., & Perkowski, M. (2013). Digital logic synthesis for memristors. In Reed-Muller 2013.
Chakraborti, S., Chowdhary, P., Datta, K., & Sengupta, I. (2014). BDD based synthesis of Boolean functions using memristors. In IDT (pp. 136–141).
Chattopadhyay, A., & Rakosi, Z. (2011). Combinational logic synthesis for material implication. In VLSI-SoC (pp. 200–203).
De Micheli, G. (1994). Synthesis and optimization of digital circuits. McGraw-Hill Higher Education.
Gaillardon, P.-E., Amarú, L., Siemon, A., Linn, E., Waser, R., & Chattopadhyay, A., et al. (2016). The programmable logic-in-memory (PLiM) computer. In DATE (pp. 427–432).
Isbell, J. R. (1980). Median algebra. Transactions of the American Mathematical Society, 260(2), 319–362.
Linn, E., Rosezin, R., Tappertzhofen, S., Böttger, U., & Waser, R. (2012). Beyond von Neumann-logic operations in passive crossbar arrays alongside memory operations. Nanotechnology, 23(305205).
Shirinzadeh, S., Soeken, M., Gaillardon, P.-E., & Drechsler, R. (2016). Fast logic synthesis for RRAM-based in-memory computing using majority-inverter graphs. In DATE (pp. 948–953).
Soeken, M., Shirinzadeh, S., Gaillardon, P.-E., Amarú, L. G., Drechsler, R., & De Micheli, G. (2016). An MIG-based compiler for programmable logic-in-memory architectures. In DAC (pp. 117:1–117:6).
Yang, S. (1991). Logic synthesis and optimization benchmarks user guide: Version 3.0. MCNC.
Acknowledgements
This research work was partly supported by H2020-ERC-2014-ADG 669354 CyberCare, by the University of Bremen’s graduate school SyDe, funded by the German Excellence Initiative, and by the Swiss National Science Foundation project number 200021 146600.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2017 Springer International Publishing AG
About this chapter
Cite this chapter
Shirinzadeh, S., Soeken, M., Gaillardon, PE., Drechsler, R. (2017). Logic Synthesis for Majority Based In-Memory Computing. In: Vaidyanathan, S., Volos, C. (eds) Advances in Memristors, Memristive Devices and Systems. Studies in Computational Intelligence, vol 701. Springer, Cham. https://doi.org/10.1007/978-3-319-51724-7_17
Download citation
DOI: https://doi.org/10.1007/978-3-319-51724-7_17
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-51723-0
Online ISBN: 978-3-319-51724-7
eBook Packages: EngineeringEngineering (R0)