Memory Management in ARM

  • K. C. WangEmail author


This chapter covers the ARM memory management unit (MMU) and virtual address space mappings. It explains the ARM MMU in detail and shows how to configure the MMU for virtual address mapping using both one-level and two-level paging. In addition, it also explains the distinction between low VA space and high VA space mappings and their implications on system implementations. Rather than only discussing the principles of memory management, it demonstrates the various kinds of virtual address mappings schemes by complete working example programs.


Physical Memory Assembly Code Physical Address Access Permission Page Table 
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  1. ARM MMU: ARM926EJ-S, ARM946E-S Technical Reference Manuals, ARM Information Center 2008.Google Scholar

Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  1. 1.School of Electrical Engineering and Computer ScienceWashington State UniversityPullmanUSA

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