Abstract
To enhance system integrity of FPGA-based embedded systems on hardware design and data communication, we propose a hardware security scheme for nonvolatile resistive random access memory (RRAM) based FPGA, in which internal block RAM (BRAMs) are used for configuration and temporary data storage. The proposed scheme loads obfuscated configurations into nonvolatile BRAMs to protect design data from physical attacks and utilizes Chip DNA to enable design functionality. Moreover, in order to support run-time and remote reconfiguration even in public and insecure environment, we propose a encrypted addressing to secure communication ports with encrypted address.
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Chen, YC., Wang, Y., Zhang, W., Chen, Y., (Helen) Li, H. (2017). In-place Logic Obfuscation for Emerging Nonvolatile FPGAs. In: Bhunia, S., Ray, S., Sur-Kolay, S. (eds) Fundamentals of IP and SoC Security. Springer, Cham. https://doi.org/10.1007/978-3-319-50057-7_11
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DOI: https://doi.org/10.1007/978-3-319-50057-7_11
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