Abstract
The experimental validation of any integrated imager design is usually hard to achieve, since it involves not only the proper electrical test procedures of any IC, but also the development of a custom lab setup for optical characterization as well. Due to practical limitations, this optical part of the imager test has to deal with the following challenges:
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Maria Margarit, J. (2017). Imager Test Chips in 2.5-, 0.35- and 0.15-\(\upmu \)m CMOS Technologies. In: Low-Power CMOS Digital Pixel Imagers for High-Speed Uncooled PbSe IR Applications. Springer Theses. Springer, Cham. https://doi.org/10.1007/978-3-319-49962-8_5
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DOI: https://doi.org/10.1007/978-3-319-49962-8_5
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