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Pixel Test Chips in 0.35- and 0.15-\(\,\upmu \)m CMOS Technologies

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Low-Power CMOS Digital Pixel Imagers for High-Speed Uncooled PbSe IR Applications

Part of the book series: Springer Theses ((Springer Theses))

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Abstract

The next two chapters report the development of both frame-based and frame-free vision sensor cores for uncooled MWIR fast imaging as concrete application examples for the FPA architectures presented in Chaps. 2 and 3.

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References

  1. A. Hastings, The Art of Analog Layout (Prentice Hall, New Jersey, 2005)

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  2. F. Serra-Graells, A. Rueda, J.L. Huertas, Low-voltage CMOS log companding analog design, in Engineering and Computer Science Analog Circuits and Signal Processing (Kluwer Academic Publishers, 2003)

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  3. M.J.M. Pelgrom, A.C.J. Duinmaijer, A.P.G. Welbers, Matching Properties of MOS transistors. IEEE J. Solid State Circuits 24(5), 1433–1440 (1989)

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Authors and Affiliations

  1. Departament d’Enginyeria Electrònica, Universitat Politècnica de Catalunya (UPC), Barcelona, Spain

    Josep Maria Margarit

  2. Institut de Microelectrònica de Barcelona - Centro Nacional de Microelectrónica (IMB-CNM), Consejo Superior de Investigaciones Científicas (CSIC), Barcelona, Spain

    Josep Maria Margarit

Authors
  1. Josep Maria Margarit
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Correspondence to Josep Maria Margarit .

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Maria Margarit, J. (2017). Pixel Test Chips in 0.35- and 0.15-\(\,\upmu \)m CMOS Technologies. In: Low-Power CMOS Digital Pixel Imagers for High-Speed Uncooled PbSe IR Applications. Springer Theses. Springer, Cham. https://doi.org/10.1007/978-3-319-49962-8_4

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  • DOI: https://doi.org/10.1007/978-3-319-49962-8_4

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-49961-1

  • Online ISBN: 978-3-319-49962-8

  • eBook Packages: EngineeringEngineering (R0)

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