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Fault-Tolerant Computing in Redundant Residue Number System

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Embedded Systems Design with Special Arithmetic and Number Systems

Abstract

The semiconductor industry is aggressively gearing towards device node miniaturization to accommodate the unceasing demands for low power and high speed computing. This inexorable trend of device scaling escalates the reliability problems of electronic products and there is a dire need to seek for new solutions to improve the reliability while maintaining the computing power. Among the alternative number representations, Residue Number System (RNS) is the most promising substitute of two’s complement number system in terms of error resiliency due to the avoidance of carry propagation. Any error introduced into a residue digit has only a localized effect, i.e., the error on one residue digit will not affect all other residue digits because it cannot propagate across different modulus channels. With the addition of redundant moduli, Redundant RNS (RRNS) possesses further fault-tolerant property whereby residue digit errors, whether they are permanent errors caused manufacturing process defects, or soft errors due to storage, transmission, or arithmetic processing, can be detected and corrected by further processing the contaminated residue digits. This chapter provides an overview of RRNS and various approaches to the single and multiple residue digit error detection and correction. Due to the iterative process of identifying the enormous possible combinations of error vector, algorithms for detecting and correcting multiple residue digit errors are more complicated and time consuming than those for the single residue digit error. This chapter sheds light on how the implementation complexity and latency to iteratively locate the erroneous residue digits can be reduced by the later syndrome-based approach over the traditional CRT-based approaches.

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Tay, T.F., Chang, CH. (2017). Fault-Tolerant Computing in Redundant Residue Number System. In: Molahosseini, A., de Sousa, L., Chang, CH. (eds) Embedded Systems Design with Special Arithmetic and Number Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-49742-6_4

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  • DOI: https://doi.org/10.1007/978-3-319-49742-6_4

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  • Online ISBN: 978-3-319-49742-6

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