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Double-Base Number System and Its Application in FIR Filter Design

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Embedded Systems Design with Special Arithmetic and Number Systems

Abstract

The electronic industry has witnessed a phenomenal growth over the last two decades, mainly due to the rapid advancement of very-large-scale integration technology. The number of integrated circuits has been rising at a very fast pace in high-performance computing, telecommunications, and consumer electronics, thanks to the proliferation of application-specific digital signal processors (DSPs). Among many different categories of DSPs, digital filter is a major function which is instrumental to successful signal separation, extraction, and restoration. This chapter presents a paradigm of programmable FIR filter design by exploiting the sparsity of double-base number system (DBNS). Due to its innate abstraction of binary shifted partial products, the sharing of adders in the time-multiplexed multiple constant multiplication block of programmable FIR filters can be maximized by a direct mapping from the canonical DBNS or the quasi-minimum extended DBNS (EDBNS) expression. The multiplexing cost can be further reduced by merging the double-base terms. This reconfigurable design can achieve significant silicon area saving by temporal resource sharing, albeit inevitable compromise in delay to adapt a fixed digital filter to multiple frequency responses. The technique is applicable to other numerical computation problems that involve the multiplication of an input signal with a predetermined set of programmable constants where the delay penalty is not a major concern. For this reason, some noteworthy features and statistics of DBNS and EDBNS will be highlighted to facilitate the development of new design methodologies that are more efficient and cost-effective for the design of FIR filters or similar functions.

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References

  1. R.H. Turner, Functionally diverse programmable logic implementations of digital signal processing algorithms. Ph.D. thesis, Queen’s University of Belfast, August 2002

    Google Scholar 

  2. T. Hentschel, Channelization for software defined base-stations. J. Ann. Telecommun. 57(5–6), 386–420 (2002)

    Google Scholar 

  3. J.F. Kaiser, Digital filters: systems analysis by digital computer (John Wiley and Sons, New York, 1966)

    MATH  Google Scholar 

  4. J. Chen, C.H. Chang, H. Qian, New power index model for switching power analysis from adder graph of FIR filter, in Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 2197–2200, Taipei, Taiwan, May 2009

    Google Scholar 

  5. D.R. Bull, D.H. Horrocks, Primitive operator digital filters. IEE Proc. G Circuits Devices Syst. 138(3), 401–412 (1991)

    Article  Google Scholar 

  6. M. Potkonjak, M.B. Srivastava, A.P. Chandrakasan, Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination. IEEE Trans. CAD Integr. Circuits Syst. 15(2), 151–165 (1996)

    Article  Google Scholar 

  7. A.G. Dempster, M.D. Macleod, Use of minimum-adder multiplier blocks in FIR digital filters. IEEE Trans. Circuits Syst. II 42(9), 569–577 (1995)

    Article  MATH  Google Scholar 

  8. R.I. Hartley, Subexpression sharing in filters using canonic signed digit multipliers. IEEE Trans. Circuits Syst. II 43(10), 677–688 (1996)

    Article  Google Scholar 

  9. Y.C. Lim, S.R. Parker, Discrete coefficient FIR digital filter design based upon an LMS criteria. IEEE Trans. Circuits Syst. CAS-30, 723–739 (1983)

    MATH  Google Scholar 

  10. R. Paško, P. Schaumont, V. Derudder, S. Vernalde, D. Ďuračková, A new algorithm for elimination of common subexpressions. IEEE Trans. CAD Integr. Circuits Syst. 18(1), 58–68 (1999)

    Article  Google Scholar 

  11. C.H. Chang, J. Chen, A.P. Vinod, Information theoretic approach to complexity reduction of FIR filter design. IEEE Trans. Circuits Syst. I 55(8), 2310–2321 (2008)

    Article  MathSciNet  Google Scholar 

  12. F. Feng, J. Chen, C.H. Chang, Hypergraph based minimum arborescence algorithm for the optimization and reoptimization of multiple constant multiplications. IEEE Trans. Circuits Syst. I 63(2), 233–244 (2016)

    Article  Google Scholar 

  13. J. Ding, J. Chen, C.H. Chang, A new paradigm of common subexpression elimination by unification of addition and subtraction. IEEE Trans CAD Integr. Circuits Syst. 35(10), 1605–1617 (2016)

    Article  Google Scholar 

  14. J. Chen, J. Tan, C.-H. Chang, F. Feng, A new cost-aware sensitivity-driven algorithm for the design of FIR filters. IEEE Trans Circuits Syst. I PP(99), 1–11 (2016)

    Google Scholar 

  15. J. Park, W. Jeong, H.M. Meimand, Y. Wang, H. Choo, K. Roy, Computation sharing programmable FIR filter for low-power and high-performance applications. IEEE J. Solid-State Circuits 39(2), 348–357 (2004)

    Article  Google Scholar 

  16. R. Mahesh, A.P. Vinod, Reconfigurable low area complexity filter bank architecture based on frequency response masking for nonuniform channelization in software radio receivers. IEEE Trans. Aerosp. Electron. Syst. 47(2), 1241–1255 (2011)

    Article  Google Scholar 

  17. J. Chen, C.H. Chang, High-level synthesis algorithm for the design of reconfigurable constant multiplier. IEEE Trans. CAD Integr. Circuits Syst. 28(12), 1844–1856 (2009)

    Article  Google Scholar 

  18. J. Chen, C.H. Chang, Design of programmable FIR filters using canonical double based number representation, in Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 1183–1186, Melbourne, Australia, June 2014

    Google Scholar 

  19. J. Chen, C.H. Chang, F. Feng, W. Ding, J. Ding, Novel design algorithm for low complexity programmable FIR filters based on extended double base number system. IEEE Trans. Circuits Syst. I 62(1), 224–233 (2015)

    Article  Google Scholar 

  20. R.A. Hawley, B.C. Wong, T.J. Lin, J. Laskowski, H. Samueli, Design techniques for silicon compiler implementations of high-speed FIR digital filters. IEEE J. Solid-State Circuits 31(5), 656–666 (1996)

    Article  Google Scholar 

  21. A.P. Oppenheim, R.W. Schafer, Discrete-time signal processing (Prentice-Hall, Englewood Cliffs, NJ, 1989)

    MATH  Google Scholar 

  22. Z. Ye, R.K. Satzoda, U. Sharma, N. Nazimudeen, C.H. Chang, Performance evaluation of direct form FIR filter with merged arithmetic architecture, in Proceedings of the 2nd IEEE International Workshop on Electronic Design, Test and Applications, pp. 407–409, Perth, Australia, Jan 2004

    Google Scholar 

  23. F. Xu, C.H. Chang, C.C. Jong, Modified reduced adder graph algorithm for multiplierless FIR filters. Electron. Lett. 41(6), 302–303 (2005)

    Article  Google Scholar 

  24. M.M. Peiro, E.I. Boemo, L. Wanhammar, Design of high-speed multiplierless filters using a nonrecursive signed common subexpression algorithm. IEEE Trans. Circuits Syst. II 49(3), 196–203 (2002)

    Article  Google Scholar 

  25. F. Xu, C.H. Chang, C.C. Jong, Contention resolution algorithms for common subexpression elimination in digital filter design. IEEE Trans. Circuits Syst. II 52(10), 695–700 (2005)

    Article  Google Scholar 

  26. F. Xu, C.H. Chang, C.C. Jong, Design of low-complexity FIR filters based on signed-powers-of-two coefficients with reusable common subexpressions. IEEE Trans. CAD Integr. Circuits Syst. 26(10), 1898–1907 (2007)

    Article  Google Scholar 

  27. P. Tummeltshammer, J. Hoe, M. Püschel, Time-multiplexed multiple-constant multiplication. IEEE Trans. CAD Integr. Circuits Syst. 26(9), 1551–1563 (2007)

    Article  Google Scholar 

  28. L. Aksoy, E. Costa, P. Flores, J. Monteiro, Exact and approximate algorithms for the optimization of area and delay in multiple constant multiplications. IEEE Trans. CAD Integr. Circuits Syst. 27(6), 1013–1026 (2008)

    Article  Google Scholar 

  29. R. Mahesh, A.P. Vinod, A new common subexpression elimination algorithm for realizing low-complexity higher order digital filters. IEEE Trans. CAD Integr. Circuits Syst. 27(2), 217–229 (2008)

    Article  Google Scholar 

  30. A. Avizienis, Signed-digit representation for fast parallel arithmetic. IRE Trans. Electron. Comput. 10, 389–400 (1961)

    Article  MathSciNet  Google Scholar 

  31. S. Arno, F.S. Wheeler, Signed digit representations of minimal hamming weight. IEEE Trans. Comput. 42(8), 1007–1010 (1993)

    Article  Google Scholar 

  32. R.W. Reitwiesner, in Binary arithmetic. Advances in Computers, vol. 1. (Academic Press, New York, 1960), pp. 231–308

    Google Scholar 

  33. Y.C. Lim, J.B. Evans, B. Liu, Decomposition of binary integers into signed power-of-two terms. IEEE Trans. Circuits Syst. 38, 667–672 (1991)

    Article  Google Scholar 

  34. I.C. Park, H.J. Kang, Digital filter synthesis based on minimal signed digit representation, in Proceedings of the IEEE Design Automation Conference, pp. 468–473, Las Vegas, Nevada, June 2001

    Google Scholar 

  35. I.C. Park, H.J. Kang, Digital filter synthesis based on an algorithm to generate all minimal signed digit representations. IEEE Trans CAD Integr. Circuits Syst. 21(12), 1525–1529 (2002)

    Article  Google Scholar 

  36. V.S. Dimitrov, G.A. Jullien, R. Muscedere, Multiple-base number system: theory and applications (CRC press, Boca Raton, 2012)

    MATH  Google Scholar 

  37. V.S. Dimitrov, G.A. Jullien, W.C. Liller, Theory and applications of the double-base number system. IEEE Trans. Comput. 48(10), 1098–1106 (1999)

    Article  Google Scholar 

  38. T.N. Shorey, R. Tijdeman, Exponential diophantine equations (Cambridge University Press, Cambridge, 1986)

    Book  MATH  Google Scholar 

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Author information

Authors and Affiliations

  1. Engineering Product Development, Singapore University of Technology and Design, Singapore, 487372, Singapore

    Jiajia Chen

  2. School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, 639798, Singapore

    Chip-Hong Chang

Authors
  1. Jiajia Chen
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  2. Chip-Hong Chang
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Correspondence to Jiajia Chen .

Editor information

Editors and Affiliations

  1. Department of Computer Engineering, Islamic Azad University, Kerman Branch, Kerman, Iran

    Amir Sabbagh Molahosseini

  2. INESC-ID, Instituto Superior Técnico, Universidade de Lisboa, Lisboa, Portugal

    Leonel Seabra de Sousa

  3. School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, Singapore

    Chip-Hong Chang

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Chen, J., Chang, CH. (2017). Double-Base Number System and Its Application in FIR Filter Design. In: Molahosseini, A., de Sousa, L., Chang, CH. (eds) Embedded Systems Design with Special Arithmetic and Number Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-49742-6_11

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  • DOI: https://doi.org/10.1007/978-3-319-49742-6_11

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-49741-9

  • Online ISBN: 978-3-319-49742-6

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