Abstract
Due to short time-to-market constraints, design house is increasing being dependent on third-party vendors to procure IPs. These IPs are designed by hundreds of IP vendors distributed across the world. Such IPs cannot be assumed to be trusted as hardware Trojans can be maliciously inserted into them and could be used in military, financial, and other critical applications. It is extremely difficult to detect Trojans in third-party IPs (3PIPs) as there is no golden version against which to compare a given IP core during verification. In this chapter,
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We present the modern system-on-chip (SoC) design flow and describe how it raises security concern towards the trustworthiness of third-party IP.
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We give a brief description of the techniques which have been proposed to verify the trustworthiness of third-party IP and also describe their limitations.
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We present a case study that tries to address the IP trust verification problem. This case study is based on identifying suspicious signals with formal verification, coverage analysis, removing redundant circuit, sequential automatic test pattern generation (ATPG), and equivalence theorems.
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Nahiyan, A., Tehranipoor, M. (2017). Code Coverage Analysis for IP Trust Verification. In: Mishra, P., Bhunia, S., Tehranipoor, M. (eds) Hardware IP Security and Trust. Springer, Cham. https://doi.org/10.1007/978-3-319-49025-0_4
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DOI: https://doi.org/10.1007/978-3-319-49025-0_4
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