Abstract
Hardware Trojans (HTs) inserted at design time by malicious insiders on the design team or third-party intellectual property providers posed a great threat on the security of computing systems. This chapter did a thorough analysis on the characterization of Trojans at design time and categorized them into bug-based HTs and parasite-based HTs. Nearly all HTs in literature are parasite-based because of its stealthiness, which means they are not activated during the functional verification stage. Based on this assumption, three methods, UCI, VeriTrust and FANCI, are introduced in this chapter to detect potential Trojans by different observations in the HT’s characteristics. These methods are proved to be effective to most HTs proposed in literature. However HT design and defence is an endless battle that attackers would always respond with more tricky HT design facing updated security verifications. In the last part of this chapter, stealthy HT designs which evade above 3 trust verification techniques would also be presented.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Notes
- 1.
Malicious on-set term is the on-set term in the malicious function whose adjacent terms in the normal function are off-set [13]. On-set term and off-set term are terms that make the function output logic “1” and logic “0”, respectively.
- 2.
Trigger values are logic values for trigger inputs to satisfy trigger condition.
References
S.T. King, J. Tucek, A. Cozzie, C. Grier, W. Jiang, Y. Zhou, Designing and implementing malicious hardware, in LEET, vol. 8 (2008), pp. 1–8
J. Zhang, Q. Xu, On hardware Trojan design and implementation at register-transfer level, in Proceedings of the IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) (2013), pp. 107–112
S. Skorobogatov, C. Woods, Breakthrough silicon scanning discovers backdoor in military chip, in Proc. International Conference on Cryptographic Hardware and Embedded Systems (CHES) (2012), pp. 23–40
Y. Liu, Y. Jin, Y. Makris, Hardware Trojans in wireless cryptographic ICs: silicon demonstration & detection method evaluation, in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (2013), pp. 399–404
M. Beaumont, B. Hopkins, T. Newby, Hardware Trojans-Prevention, Detection, Countermeasures (A Literature Review) (Australian Government Department of Defense, 2011)
Defense Science Board Task Force on High Performance Micorchip Supply, Office of the Under Secretary of Defense for Acquisition, Technology, and Logistics (United States Department of Defense, 2005)
Y. Jin, N. Kupp, Y. Makris. Experiences in hardware trojan design and implementation, in Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust (2009), pp. 50–57
Trust-Hub Website, https://www.trust-hub.org/
S. Wei, K. Li, F. Koushanfar, M. Potkonjak, Hardware Trojan horse benchmark via optimal creation and placement of malicious circuitry, in Proceedings of ACM/IEEE Design Automation Conference (2012), pp. 90–95
M. Hicks, M. Finnicum, S.T. King, M.K. Martin, J.M. Smith, Overcoming an untrusted computing base: detecting and removing malicious hardware automatically, in Proceedings of the IEEE Symposium on Security and Privacy (SP) (2010), pp. 159–172
C. Sturton, M. Hicks, D. Wagner, S. T King, Defeating UCI: building stealthy and malicious hardware, in Proceedings of the IEEE International Symposium on Security and Privacy (SP) (2011), pp. 64–77
J. Bormann, et al., Complete formal verification of TriCore2 and other processors, in Design and Verification Conference (2007)
J. Zhang, F. Yuan, L. Wei, Z. Sun, Q. Xu, VeriTrust: verification for hardware trust, in Proc. IEEE/ACM Design Automation Conference (DAC) (2013), pp. 1–8
A. Waksman, M. Suozzo, S. Sethumadhavan, FANCI: identification of stealthy malicious logic using boolean functional analysis, in Proceedings of the ACM Conference on Computer and Communication Security (CCS) (2013), pp. 697–708
J. Zhang, F. Yuan, Q. Xu, DeTrust: defeating hardware trust verification with stealthy implicitly-triggered hardware trojans, in Proceedings of the ACM Conference on Computer and Communication Security (CCS) (2014), pp. 153–166
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2017 Springer International Publishing AG
About this chapter
Cite this chapter
Xu, Q., Wei, L. (2017). Hardware Trust Verification. In: Mishra, P., Bhunia, S., Tehranipoor, M. (eds) Hardware IP Security and Trust. Springer, Cham. https://doi.org/10.1007/978-3-319-49025-0_11
Download citation
DOI: https://doi.org/10.1007/978-3-319-49025-0_11
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-49024-3
Online ISBN: 978-3-319-49025-0
eBook Packages: EngineeringEngineering (R0)