Advertisement

A Proof Method for Linearizability on TSO Architectures

  • John DerrickEmail author
  • Graeme Smith
  • Lindsay Groves
  • Brijesh Dongol
Chapter
Part of the NASA Monographs in Systems and Software Engineering book series (NASA)

Abstract

Linearizability is the standard correctness criterion for fine-grained non-atomic concurrent algorithms, and a variety of methods for verifying linearizability have been developed. However, most approaches to verifying linearizability assume a sequentially consistent memory model, which is not always realised in practice. In this chapter we study the use of linearizability on a weak memory model. Specifically we look at the TSO (Total Store Order) memory model, which is implemented in the x86 multicore architecture. A key component of the TSO architecture is the use of write buffers, which are used to store pending writes to memory. In this chapter, we explain how linearizability is defined on TSO, and how one can adapt a simulation-based proof method for use on TSO. Our central result is a proof method that simplifies simulation-based proofs of linearizability on TSO. The simplification involves constructing a coarse-grained abstraction as an intermediate specification between the abstract representation and the concurrent algorithm.

Keywords

Global Memory Proof Obligation Abstract Operation Proof Method Abstract Specification 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    Alglave, J., Fox, A., Ishtiaq, S., Myreen, M.O., Sarkar, S., Sewell, P., Nardelli, F.Z.: The semantics of power and arm multiprocessor machine code. In: Petersen, L., Chakravarty, M.M.T. (eds.) DAMP ’09, pp. 13–24. ACM (2008)Google Scholar
  2. 2.
    Amit, D., Rinetzky, N., Reps, T.W., Sagiv, M., Yahav, E.: Comparison under abstraction for verifying linearizability. In: Damm, W., Hermanns, H. (eds.) CAV 2007, Volume of 4590 LNCS, pp. 477–490. Springer (2007)Google Scholar
  3. 3.
    Bovet, D., Cesati, M.: Understanding the Linux Kernel, 3rd edn. O’Reilly, Sebastopol (2005)Google Scholar
  4. 4.
    Burckhardt, S., Gotsman, A., Musuvathi, M., Yang, H.: Concurrent library correctness on the TSO memory model. In: Seidl, H. (ed.) ESOP 2012, volume 7211 of LNCS, pp. 87–107. Springer (2012)Google Scholar
  5. 5.
    Calcagno, C., Parkinson, M., Vafeiadis,V.: Modular safety checking for fine-grained concurrency. In: Nielson, H.R., Filé, G. (eds.) SAS 2007, volume 4634 of LNCS, pp. 233–238. Springer (2007)Google Scholar
  6. 6.
    Chase, D., Lev, Y.: Dynamic circular work-stealing deque. In: Gibbons, P.B., Spirakis, P.G. (eds.) SPAA, pp. 21–28. ACM (2005)Google Scholar
  7. 7.
    Derrick, J., Boiten, E.: Refinement in Z and Object-Z: Foundations and Advanced Applications, 2nd edn. Springer, Berlin (2014)CrossRefzbMATHGoogle Scholar
  8. 8.
    Derrick, J., Schellhorn, G., Wehrheim, H.: Proving linearizability via non-atomic refinement. In: Davies, J., Gibbons, J. (eds.) IFM 2007, volume 4591 of LNCS, pp. 195–214. Springer (2007)Google Scholar
  9. 9.
    Derrick, J., Schellhorn, G., Wehrheim, H.: Mechanically verified proof obligations for linearizability. ACM Trans. Program. Lang. Syst. 33(1), 4 (2011)CrossRefGoogle Scholar
  10. 10.
    Derrick, J., Schellhorn, G., Wehrheim, H.: Verifying linearisabilty with potential linearisation points. In: Butler, M., Schulte, W. (eds.) FM 2011, volume 6664 of LNCS, pp. 323–337. Springer (2011)Google Scholar
  11. 11.
    Derrick, J., Smith, G., Dongol, B.: Verifying linearizability on TSO architectures. In: iFM 2014, volume 8739 of LNCS, pp. 341–356 (2014)Google Scholar
  12. 12.
    Derrick, J., Smith, G., Groves, l., Dongol, B.: Using coarse-grained abstractions to verify linearizability on TSO architectures. In: HVC2014, volume 8855 of LNCS (2014)Google Scholar
  13. 13.
    Doherty, S., Groves, L., Luchangco, V., Moir, M.: Formal verification of a practical lock-free queue algorithm. In: de Frutos-Escrig, D., Nunez, M. (eds.) FORTE 2004, volume 3235 of LNCS, pp. 97–114. Springer (2004)Google Scholar
  14. 14.
    Dongol, B., Derrick, J.: Verifying linearisability: a comparative survey. ACM Comput. Surv. 48(2):19:1–19:43 (2015)Google Scholar
  15. 15.
    Gotsman, A., Musuvathi, M., Yang, H.: Show no weakness: sequentially consistent specifications of TSO libraries. In: Aguilera, M. (ed.) DISC 2012, volume 7611 of LNCS, pp. 31–45. Springer (2012)Google Scholar
  16. 16.
    Herlihy, M., Wing, J.M.: Linearizability: a correctness condition for concurrent objects. ACM Trans. Program. Lang. Syst. 12(3), 463–492 (1990)CrossRefGoogle Scholar
  17. 17.
    Liu, F., Nedev, N., Prisadnikov, N., Vechev, M.T., Yahav, E.: Dynamic synthesis for relaxed memory models. In: Vitek, J., Lin, H., Tip, F. (eds.) PLDI, pp. 429–440. ACM (2012)Google Scholar
  18. 18.
    Morrison, A., Afek, Y.: Fence-free work stealing on bounded TSO processors. In: ASPLOS, pp. 413–426. ACM (2014)Google Scholar
  19. 19.
    Reif, W., Schellhorn, G., Stenzel, K., Balser, M.: Structured specifications and interactive proofs with KIV. In: Automated Deduction, pp. 13–39. Kluwer (1998)Google Scholar
  20. 20.
    Schellhorn, G., Wehrheim, H., Derrick, J.: A sound and complete proof technique for linearizability of concurrent data structures. ACM Trans. Comput. Logic (2014)Google Scholar
  21. 21.
    Sewell, P., Sarkar, S., Owens, S., Nardelli, F.Z., Myreen, M.O.: x86-TSO: a rigorous and usable programmer’s model for x86 multiprocessors. Commun. ACM 53(7), 89–97 (2010)CrossRefGoogle Scholar
  22. 22.
    Smith, G., Derrick, J., Dongol, B.: Admit your weakness: Verifying correctness on TSO architectures. In: FACS, volume 8997 of LNCS. Springer (2015)Google Scholar
  23. 23.
    Sorin, D.J., Hill, M.D., Wood, D.A.: A Primer on Memory Consistency and Cache Coherence. Synthesis Lectures on Computer Architecture. Morgan & Claypool Publishers (2011)Google Scholar
  24. 24.
    Travkin, O., Mütze, A., Wehrheim, H.: SPIN as a linearizability checker under weak memory models. In: Bertacco, V., Legay, A. (eds.), HVC2013, volume 8244 of LNCS, pp. 311–326. Springer (2013)Google Scholar
  25. 25.
    Vafeiadis, V.: Modular fine-grained concurrency verification. PhD thesis, University of Cambridge (2007)Google Scholar

Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • John Derrick
    • 1
    Email author
  • Graeme Smith
    • 2
  • Lindsay Groves
    • 3
  • Brijesh Dongol
    • 4
  1. 1.Department of ComputingUniversity of SheffieldSheffieldUK
  2. 2.School of Information Technology and Electrical EngineeringThe University of QueenslandSt LuciaAustralia
  3. 3.School of Engineering and Computer ScienceVictoria University of WellingtonWellingtonNew Zealand
  4. 4.Department of Computer ScienceBrunel University of LondonLondonUK

Personalised recommendations