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Historical Overview of Solid-State Non-Volatile Memories

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In Search of the Next Memory

Abstract

I can say that my career can be superimposed, for a long time, on the story of non-volatile memories.

There are 10 different kinds of people.

Those who understand binary, and those who don’t.

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Notes

  1. 1.

    Memory-hardware designers always mean bit, speaking about memory size. So, for me, a memory of 1 M means one megabit. Software people always speak about Byte!.

  2. 2.

    For me the word bootstrap didn’t have a clear meaning. I knew what the bootstrap is, but when I eventually understood the real meaning of this, and I started to imagine someone trying to lift up himself pulling on the boot straps, I really came to understand the meaning of this in electronics circuits.

  3. 3.

    In 1965, just a couple of years after Jack Kilby patented the bipolar transistor, Intel’s co-founder Gordon Moore observed that the number of transistor per square inch in an integrated circuit doubled every year. Moore foresaw that this trend would be valid for the years to come: indeed, the doubling of the density of the active components in an integrated circuit proved to occur every 18 months, and this is the commonly accepted value for the definition of Moore’s law today.

  4. 4.

    My first PC, a few years ago, after the Z80 and some other machines, was a 16 MHz clock PC with a 16 MB hard disk. Today, in a cellular phone, the nonvolatile memory is measured in GB.

  5. 5.

    This was not a ‘choice’ but, due to the array organization in a NAND structure, it is not possible to apply a current to program with the CHE effect.

References

  1. G. Campardo et al. “A 40 mm 2 3 V 50 MHz 64 Mb 4-level Cell NOR Type Flash Memory, IEEE Journal of Solid State Circuits, Vol. 35, N0 11, November 2000.

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  2. G. Campardo and R. Micheloni “Architecture of nonvolatile memory with multi-bit cells” Elsevier Science, Microelectronic Engineering, Volume 59, Issue 1-4, November 2001, pp. 173–181.

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  3. G. Campardo, R. Micheloni “Scanning the Issue”, Proceeding of the IEEE, VOL. 91, No. 4, April 2003, Special Issue on the Flash Memories.

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  4. G. Campardo et al. “An Overview of Flash Architectural Developments” Proceeding of the IEEE, April 2003.

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  5. R. Micheloni et al. “The Flash Memory Read Path: building blocks and critical aspects” Proceeding of the IEEE, April 2003.

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  6. G. Campardo, R. Micheloni, D. Novosel “VLSI-Design of Non-Volatile Memories”, Springer Series in ADVANCED MICROELECTRONICS, 2005.

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  7. P. Pulici, G. Campardo, G. P. Vanalli, P. P. Stoppino, T. Lessio, A. Vigilante, A. Losavio, G. Ripamonti “1 V NOR Flash memory employing inductor merged within package” Electronics Letters, vol. 43, no. 10, Page(s): 566–567, 2007.

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  8. G. Campardo, R. Micheloni “La rivoluzione delle memorie,” Le Scienze, italian editon of SCIENTIFIC AMERICAN, number 468- August 2007, pagg. 104–110.

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  9. R. Micheloni, G. Campardo, P. Olivo, “Memories in Wireless Systems”, Springer Verlag, 2008.

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  10. A. Maurelli, D. Beloit, G. Campardo, “SoC and SiP, the Yin and Yang of the Tao for the new Electronic Era”, Proceeding of the IEEE, Vol. 97, number 1, January 2009, Special Issue on the 3D Integration Technology.

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  12. G. Campardo, F. Tiziani, M. Iaculo “Memory Mass Storage”, Springer Verlag, March 2011.

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Author information

Authors and Affiliations

  1. ADG Automotive Digital Division - Product Design, STM, Agrate, Italy

    Giovanni Campardo

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  1. Giovanni Campardo
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Correspondence to Giovanni Campardo .

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Editors and Affiliations

  1. Milan, Italy

    Roberto Gastaldi

  2. ST Microelectronics , Milan, Italy

    Giovanni Campardo

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Campardo, G. (2017). Historical Overview of Solid-State Non-Volatile Memories. In: Gastaldi, R., Campardo, G. (eds) In Search of the Next Memory. Springer, Cham. https://doi.org/10.1007/978-3-319-47724-4_2

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  • DOI: https://doi.org/10.1007/978-3-319-47724-4_2

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-47722-0

  • Online ISBN: 978-3-319-47724-4

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