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Throughput-Driven Parallel Embedded Software Synthesis from Synchronous Dataflow Models: Caveats and Remedies

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Model-Implementation Fidelity in Cyber Physical System Design

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Abstract

Synchronous dataflow (SDF) graphs are often the computational model of choice for specification, analysis, and automated synthesis of parallel streaming kernels targeting embedded multiprocessor system-on-a-chip (MPSoC) platforms. We discuss several limitations of the SDF graphs in the context of conventional parallel software synthesis methodologies, and highlight the associated degradation in analysis accuracy and performance of the synthesized software. Subsequently, we propose several extensions to the strict notion of SDF graph model that address the identified issues. We present extensive empirical evaluations, which underscore the model limitations and the effectiveness of our approach.

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Notes

  1. 1.

    Auto-concurrency, i.e., multiple concurrent firings of an actor, is not allowed in our discussion.

  2. 2.

    Here, we use the terms “steady-state throughput” and “throughput” interchangeably.

  3. 3.

    We also experimented with SDF3 benchmarks in Sect. 4.2.5.2. However SDF3 benchmarks merely include graph parameters and not task implementations. Thus, we could only perform the experiments shown in Fig. 4.6a, b and not c. Detailed results are omitted due space limits. For SDF3 benchmarks, on average, buffer size reduction using implementation aware analysis is 6×, and runtime ratio of implementation aware over implementation oblivious is 5×.

  4. 4.

    The discussion does not pertain to sorting of large databases which do not entirely fit in the memory.

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Authors and Affiliations

  1. Sharif University of Technology, Tehran, Iran

    Matin Hashemi & Kamyar Mirzazad Barijough

  2. University of California, Davis, CA, USA

    Soheil Ghiasi

Authors
  1. Matin Hashemi
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  2. Kamyar Mirzazad Barijough
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  3. Soheil Ghiasi
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Correspondence to Matin Hashemi .

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Editors and Affiliations

  1. Campus MINATEC, CEA, Grenoble, France

    Anca Molnos

  2. Campus MINATEC, CEA, Grenoble, France

    Christian Fabre

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Hashemi, M., Barijough, K.M., Ghiasi, S. (2017). Throughput-Driven Parallel Embedded Software Synthesis from Synchronous Dataflow Models: Caveats and Remedies. In: Molnos, A., Fabre, C. (eds) Model-Implementation Fidelity in Cyber Physical System Design. Springer, Cham. https://doi.org/10.1007/978-3-319-47307-9_4

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  • DOI: https://doi.org/10.1007/978-3-319-47307-9_4

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