Abstract
In the formal methods community, the correctness of interlocking tables is typically verified by model checking. This paper suggests to use a static checker for this purpose and it demonstrates for the RobustRailS verification tool set that the execution time and memory usage of its static checker are much less than of its model checker. Furthermore, the error messages of the static checker are much more informative than the counter examples produced by classical model checkers.
A.E. Haxthausen and P.H. Østergaard—The authors’ research has been funded by the RobustRailS project granted by Innovation Fund Denmark.
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- 1.
Interlocking tables are also sometimes called control tables.
- 2.
- 3.
These include points in the path and overlap, and points used for flank and front protection. For detail about flank and front protection, see [16].
- 4.
This essentially means that they use the same track elements. For a complete definition, see [19].
- 5.
It should here be noted that using this model checker in a second step for verifying the safety of the model of the instantiated interlocking system has actually turned out to be very efficient. For instance, it succeeded to verify the EDL line, where other model checkers failed within some given resources, cf. [22].
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Acknowledgements
The authors would like to express their gratitude to (1) Jan Peleska and Linh Hong Vu for the excellent contribution to the development of the RobustRailS interlocking verification method and tool set (including the static checker discussed in this paper) and for an always very enjoyable collaboration, (2) Ross Edwin Gammon and Nikhil Mohan Pande from Banedanmark and Jan Bertelsen from Thales for helping with their expertise about Danish interlocking systems, and (3) Uwe Schulze and Florian Lapschies from the University of Bremen for their help with the implementation in the RT-Tester toolchain.
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Haxthausen, A.E., Østergaard, P.H. (2016). On the Use of Static Checking in the Verification of Interlocking Systems. In: Margaria, T., Steffen, B. (eds) Leveraging Applications of Formal Methods, Verification and Validation: Discussion, Dissemination, Applications. ISoLA 2016. Lecture Notes in Computer Science(), vol 9953. Springer, Cham. https://doi.org/10.1007/978-3-319-47169-3_19
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