Abstract
In the past several decades, Moore’s law has successfully predicted integrated circuit (IC) technology advancement. However, IC technology began hitting both technology and cost barriers. Conventional die shrinkage and advanced deep-submicron semiconductor technology is no longer able to meet the cost-to-performance ratio that the world desires in the near future. Three-dimensional (3D) packaging has caught broad attention and is poised to help continue the Moore’s law by vertically integrating multiple IC chips into same footprint. In order to enable highly integrated 3D packaging, both the substrate and the printed wiring board (PWB) receiving the 3D package need to meet the signal and power density requirements. Substrate material and fabrication technologies play critical role in succeeding the future needs of smaller size, lower cost, and higher performance.
In this chapter, an overview of the substrate technology evolution in the past several decades will be discussed. The overview covers the substrates used in large varieties of packages, such as dual-in-line packages (DIP), quad flat package (QFP), area array package, and embedded wafer level ball grid array (eWLB) packages. The materials used in substrates will be discussed with a concentration on organic substrate materials. The discussion will cover key consideration points in material selection and application. The substrate fabrication technology will be also discussed in detail. The process technologies on the fabrication of cores, build-up dielectric layers, metal layers and traces, plated through holes (PTH) and vias, contact pads, solder mask, in addition to surface finishes will be covered. The general recommendation in selecting and applying the appropriate process technologies will be recommended.
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References
I. Szendiuch, Development in electronic packaging—moving to 3D system configuration. Radioengineering 20(1), 214–220 (2011)
Y. Nakamura, S. Katogi, Technology trends and future history of semiconductor packaging substrate material, Hitachi Chemical Technical Report No. 55, Hitachi Chemical, 2013
C.F. Coombs Jr., Printed Circuits Handbook, 6th edn. (McGraw-Hill, New York, 2008)
M. Jassal, S. Ghosh, Aramid fibres—an overview. Indian J. Fibre Text. Res. 27, 290–306 (2002)
S. Bagen, D. Alcoe, F. D. Egitto, R. N. Das, G. Thomas, Advanced organic substrate technologies to enable extreme electronics miniaturization. Presented on IEEE Components, Packaging and Manufacturing Technology Chapter, Santa Clara Valley, Endicott Interconnect Technologies, New York, 13 Feb 2013
Design Guidelines 2013 (External) (DYCONEX, MST Company, Bassersdorf, Switzerland, 2013)
S. Shi, Study on no-flow underfill materials for low-cost flip-chip applications, Ph.D. Thesis, Georgia Institute of Technology, 28 Mar 2000
R.R. Tummala, E.J. Rymaszewski, A.G. Klopfenstein, Microelectronics Packaging Handbook—Semiconductor Packaging, Part II, 2nd edn. (Kluwer Academic, Berlin, 1997)
M.L. Minges, Electronic Materials Handbook: Packaging, vol 1 (ASM International, Novelty, OH, 1989)
M. Jawitz, in Printed Circuit Board Materials Handbook, ed. by M. Jawitz (McGraw-Hill, New York, 1997)
D.C. Thompson, O. Tantot, H. Jallageas, G.E. Ponchak, M.M. Tentzeris, J. Papapolymerou, Characterization of liquid crystal polymer (LCP) material and transmission lines on LCP substrates from 30 to 110 GHz. IEEE Trans. Microwave Theory Tech. 52(4), 1343–1352 (2004)
N. Kingsley, Liquid crystal polymer: enabling next-generation conformal and multilayer electronics. Microwave J. 51(5), 188–200 (2008)
T. Shiraishi, K. Amami, Y. Bessho, K. Sakamaoto, K. Eda, T. Ishida, Flip chip MPU module using high performance printed circuit board “ALIVH”. Int. J. Microcircuits Electron. Packag. 21(2), 205–211 (1998)
IPC-HDBK-840, Solder Mask Handbook. (Association Connecting Electronics Industries (IPC), Bannockburn, IL, 2006)
T. Nagoshi, S. Tanaka, K. Yoshizako, S. Fukuzumi, K. Kurafuchi, Photosensitive solder resist film for semiconductor package “FZ Series”, Hitachi Chemical Technical Report No. 54, Hitachi Chemical, 2012
R.S. Khandpur, Printed Circuit Boards, Design Fabrication and Assembly and Testing (McGraw-Hill, New York, 2006)
K. Gileo, Printed Circuit Board (ET-Trends LLC, Port Orange, FL, 2014)
Recent Japanese Developments in Printed Wiring Boards for SMT, IEEE Electr. Insul. Mag. 7(2), 9–16 (1991)
Advanced Full Additive Process for High Density Printed Wiring Boards, in Japan IEMT Symposium, 1989, pp. 141–146
D. Walsh, G. Milad, D. Gudeczauskas, Know your final finish options. Printed Circuit Des. Manuf. 23(2), 38 (2006)
The PWB Magazine, February 2015
Acknowledgment
The editors would like to thank Sangil Lee from Invensas Corporation and Kyu-oh Lee from Intel Corporation for their critical review of this chapter.
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Shi, S., Tortorici, P. (2017). Fundamentals of Advanced Materials and Processes in Organic Substrate Technology. In: Li, Y., Goyal, D. (eds) 3D Microelectronic Packaging. Springer Series in Advanced Microelectronics, vol 57. Springer, Cham. https://doi.org/10.1007/978-3-319-44586-1_11
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DOI: https://doi.org/10.1007/978-3-319-44586-1_11
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