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Fundamentals of Heat Dissipation in 3D IC Packaging

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3D Microelectronic Packaging

Part of the book series: Springer Series in Advanced Microelectronics ((MICROELECTR.,volume 57))

Abstract

Cooling of a planar 2D IC chip utilizes heat transfer from a face of the chip through a heat sink. In case of a 3D IC chip stack, the individual chip faces are not available for mounting conventional heat sinks. Mounting the heat sinks on the ends is feasible, but the heat flow paths for the interior chips from the junction to the heat sink become longer. Further, multiple heat sources present along the heat flow paths in stacked chips may create localized hot spots which exceed the allowable junction temperatures. Introducing interlayer cooling with microchannels and introducing fins in the coolant flow paths extend the thermal dissipation capability of a 3D stack; however, this is often accompanied with taller microchannels that lead to longer lengths of through-silicon-vias (TSVs). Placement of TSVs, microchannels walls, and fins present conflicting design requirements. Therefore codesign and innovative approaches are seen as critical before widespread commercialization of 3D ICs becomes a reality. An overview of the available cooling options for 3D ICs and their performance evaluation are presented in this chapter.

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References

  1. S.G. Kandlikar, Review and projections of integrated cooling systems for 3D ICs. J. Electron. Packag. 136(2), 024001. doi:10.1115/1.4027175, 11 p

  2. D.B. Tuckerman, R.F. Pease, High performance heat sinking for VLSI. IEEE Electron. Dev. Lett. 2(5), 126–129 (1981)

    Article  Google Scholar 

  3. S.G. Kandlikar, A.V. Bapat, Evaluation of Jet impingement, spray, and microchannel chip cooling options for high heat flux removal. Heat Transfer. Eng. 28(11), 911–923 (2007)

    Article  Google Scholar 

  4. A.C. Cotler, E.R. Brown, V. Dhir, M.C. Shaw, Chip-level spray cooling of an LD-MOSFET RF power amplifier. IEEE Trans. Comp. Packag. Technol. 27(2), 411–416 (2004)

    Article  Google Scholar 

  5. C.J. Chang, H.T. Chen, C. Gau, Flow and heat transfer of a Microjet Impinging on a Heated Chip: Part I—micro free and impinging Jet. Nanosc. Microsc. Thermophys. Eng. 17(1), 50–68 (2013)

    Article  Google Scholar 

  6. C.J. Chang, H.T. Chen, C. Gau, Flow and Heat transfer of a Microjet Impinging on a Heated Chip: Part II—heat transfer. Nanosc. Microsc. Thermophys. Eng. 17(2), 92–111 (2013)

    Article  Google Scholar 

  7. E.G. Colgan, B. Furman, M. Gaynes, N. LaBianca, J.H. Magerlein, R. Polastre, R. Bezama, K. Marston, R. Schmidt, High performance and subambient silicon microchannel cooling. J. Heat. Transfer. 129(8), 1046–1051 (2007)

    Article  Google Scholar 

  8. M. E. Steinke, S.G. Kandlikar, Single-Phase Liquid Heat Transfer in Plain and Enhanced Microchannels. In ASME 4th International Conference on Nanochannels, Microchannels and Minichannels, Limerick, June 19–21, ASME Paper No. ICNMM2006-96227

    Google Scholar 

  9. S.G. Kandlikar, D. Kudithipudi, C.A. Rubio-Jimenez, Cooling mechanisms in 3D ICs: thermo-mechanical perspective, In IEEE International Green Computing Conference and Workshops (IGCC), Orlando, 25–28 July 2011.

    Google Scholar 

  10. W.M. Kays, A.L. London, Compact Heat Exchangers (McGraw Hills, New York, 1984)

    Google Scholar 

  11. W.-L. Cheng, W.-W. Zhang, H. Chen, L. Hu, Spray cooling and flash evaporation cooling: the current development and application. Renew. Sustain. Energy Rev. 55, 614–628 (2016)

    Article  Google Scholar 

  12. S.G. Kandlikar, W.J. Grande, Evolution of microchannel flow passages—thermohydraulic performance and fabrication technology. Heat Trans. Eng. 24(1), 3–17 (2003)

    Article  Google Scholar 

  13. J.-M. Koo, S. Im, L. Jiang, K.E. Goodson, Integrated microchannel cooling for three-dimensional electronic circuit architecture. J. Heat Transfer. 127(1), 49–58 (2005)

    Article  Google Scholar 

  14. A.W. Topol, D.C. La Tulipe, L. Shi, D.J. Frank, Three-dimensional integrated circuit. IBM J. Res. Dev. 50(4.5), 491—506 (2010)

    Google Scholar 

  15. H. Mizunuma, L.Y. Chang, Y. Chia-Lin, Thermal modeling and analysis for 3-D ICs with integrated microchannel cooling. IEEE Trans. Comput. Aided. Design Integ. Circuits Syst. 30(9), 1293–306 (2011). doi:10.1109/TCAD.2011.2144596

    Article  Google Scholar 

  16. J.H. Lau, T.G. Yue, Thermal management of 3D IC integration with TSV (through silicon via), In 59th Electronic Components and Technology Conference, San Diego, 26–29 May 2009, pp. 635–640

    Google Scholar 

  17. K. Puttaswamy, G.H. Loh, Thermal analysis of a 3D die-stacked high-performance microprocessor. In Proceedings of the 16th ACM Great Lakes Symposium on VLSI, New York, pp. 19–24

    Google Scholar 

  18. W. Huang, M.R. Stan, S. Gurumurthi, R.J. Ribando, K. Skadron, Interaction of scaling trends in processor architecture and cooling. In 26th Annual IEEE SEMI-THERM, Santa Clara, 2010, pp. 198–204

    Google Scholar 

  19. P. Chaparro, J. González, G. Magklis, C. Qiong, A. González, Understanding the thermal implications of multi-core architectures. IEEE Trans. Parallel Distrib. Syst. 18(8), 1055–1065 (2007)

    Article  Google Scholar 

  20. I. Yeo, C.C. Liu, E.J. Kim, Predictive dynamic thermal management for multicore systems. In Proceedings of DAC, Anaheim, 2008, pp. 734–739

    Google Scholar 

  21. H.F. Sheikh, H. Tan, I. Ahmad, S. Ranka, B. Phanisekhar. Energy-and performance-aware scheduling of tasks on parallel and distributed systems. J. Emerg. Technol. Comput. Syst. 8(4), 32 (2012)

    Google Scholar 

  22. D. Cuesta, J. Ayala, J. Hidalgo, D. Atienza, A. Acquaviva, E. Macii, Adaptive task migration policies for thermal control in MPSoCs. In VLSI 2010 Annual Symposium, Lixouri, 5–7 July 2010, pp. 83–115

    Google Scholar 

  23. T. Ge, P. Malani, Q. Qiu, Distributed task migration for thermal management in many-core systems. In Proceedings of DAC, Anaheim, 8–13 June 2008, pp. 579–584

    Google Scholar 

  24. J. Cui, D. Maskell, A fast high-level event-driven thermal estimator for dynamic thermal aware scheduling. IEEE Trans. Comput. Aided Design Integr. Circuits Syst. 31(6), 904–917 (2012)

    Article  Google Scholar 

  25. D. Yinon, T.D. Dudderar, B.J. Han, A.M. Lyons, Thin packaging of multi-chip modules with enhanced thermal/power management, U.S. Patent 5,646,828, 8 July 1997

    Google Scholar 

  26. M. Qing, H. Fujimoto, Silicon interposer and multi-chip-module (MCM) with through substrate vias, U.S. Patent 6,229,216, 2001

    Google Scholar 

  27. G. Brent, S.S. Sapatnekar, Placement of thermal vias in 3-D ICs using various thermal objectives. IEEE Trans. Comput. Aided Design. Integr. Circuits Syst. 25(4), 692–709 (2006)

    Article  Google Scholar 

  28. D.B. Tuckerman, R.F.W. Pease, High-performance heat sinking for VLSI. Electron Dev. Lett. 2(5), 126–129 (1981)

    Article  Google Scholar 

  29. B. Dang, M.S. Bakir, D.C. Sekar, C.R. King Jr., J.D. Meindl, Integrated microfluidic cooling and interconnects for 2D and 3D chips. IEEE Trans. Adv. Packag. 33(1), 79–87 (2010)

    Article  Google Scholar 

  30. S.G. Kandlikar, Fundamental issues related to flow boiling in minichannels and microchannels. Exp. Therm. Fluid Sci. 26(2–4), 389–407 (2002)

    Article  Google Scholar 

  31. HotSpot. http://lava.cs.virginia.edu/HotSpot/links.htm

  32. 3D-ICE. http://esl.epfl.ch/3d-ice.html

  33. A.W. Topol, D.C. La Tulipe, L. Shi, D.J. Frank, K. Bernstein, S.E. Steen, A. Kumar et al.. Three-dimensional integrated circuits. IBM J. Res. Dev. 50(4.5), 491–506 (2006)

    Google Scholar 

  34. P. Jacob, O. Erdogan, A. Zia, P.M. Belemjian, R.P. Kraft, J.F. McDonald, Predicting the performance of a 3D processor-memory chip stack. Design Test Comput. 22(6), 540–547 (2005)

    Article  Google Scholar 

  35. L. Feihui, C. Nicopoulos, T. Richardson, Y. Xie, V. Narayanan, M. Kandemir, Design and management of 3D chip multiprocessors using network-in-memory. IEEE Comput. Soc. 34(2), 130–141 (2006)

    Google Scholar 

  36. T. Brunschwiler, B. Michel, H. Rothuizen, U. Kloter, B. Wunderle, H. Oppermann, H. Reichl, Forced convective interlayer cooling in vertically integrated packages. In Proceedings of the 11th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, vols. 1–3, Orlando, 28–31 May 2008, pp. 1114–1125

    Google Scholar 

  37. D. Lorenzini-Gutierrez, S.G. Kandlikar, Variable Fin density flow channels for effective cooling and mitigation of temperature nonuniformity in three-dimensional integrated circuits. J. Electron. Packag. 136, 021007–021011 (2014)

    Article  Google Scholar 

  38. J.-L. Hernandez-Gonzalez, S.G. Kandlikar, Performance assessment comparison of variable fin density microchannels with offset configurations. Heat Transfer Eng. 37(2), 1369–1381 (2016). doi:10.1080/01457632.2015.1136146

    Article  Google Scholar 

  39. S.G. Kandlikar, D. Kudithipudi, A. Rubio-Jimenez, Cooling mechanisms in 3D ICs: thermo-Mechanical Perspective. In Proceedings of Green Computing Conference and Workshops (IGCC), Orlando, 25–28 July 2011. doi:10.1109/IGCC.2011.6008573

  40. Y. Zhang, C.R. King, J. Zaveri, Y.J. Kim, V. Sahu, Y. Joshi, M.S. Bakir, Coupled electrical and thermal 3D IC centric microfluidic heat sink design and technology. In 61st Electronic Components and Technology Conference (ECTC), Lake Buena Vista, 2011, pp. 2037–2044. doi:10.1109/ECTC.2011.5898797

  41. F. Alfieri, M.K. Tiwari, I. Zinovik, D. Poulikakos, T. Brunschwiler, B. Michel, 3D integrated water cooling of a composite multilayer stack of chips. J. Heat Transfer 132(12), 121402 (2010). doi:10.1115/1.4002287. 9 p

    Article  Google Scholar 

  42. A. Kalani, S.G. Kandlikar, Combining liquid inertia with pressure recovery from bubble expansion for enhanced flow boiling. Appl. Phys. Lett. 107, 181601 (2015). doi:10.1063/1.4935211

    Article  Google Scholar 

  43. Y. Zhu, D.S. Antao, K.H. Chu, T.J. Hendricks, E.N. Wang, Enhanced flow boiling heat transfer in microchannels with structures surfaces. In 15th International Heat Transfer Conference, Kyoto, 2014

    Google Scholar 

  44. C. Green, P. Kottke, X. Han, C. Woodrum, T. Sarvey, P. Asrar, X. Zhang, Y. Joshi, A. Fedorov, S. Sitaraman, M. Bakir, A review of two-phase forced cooling in three-dimensional stacked electronics: technology integration, J. Electron. Packag. 137, 040802, 9 p

    Google Scholar 

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Acknowledgement

The editors would like to thank Songhua Shi from Medtronic and Ravi Mahajan from Intel Corporation for their critical review of this chapter.

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Authors and Affiliations

  1. Mechanical Engineering Department, Rochester Institute of Technology, Rochester, NY, USA

    Satish G. Kandlikar

  2. Computer Engineering Department, Rochester Institute of Technology, Rochester, NY, USA

    Amlan Ganguly

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  1. Satish G. Kandlikar
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  2. Amlan Ganguly
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Correspondence to Satish G. Kandlikar .

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Editors and Affiliations

  1. Intel Corporation, Chandler, Arizona, USA

    Yan Li

  2. Intel Corporation, Chandler, Arizona, USA

    Deepak Goyal

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Kandlikar, S.G., Ganguly, A. (2017). Fundamentals of Heat Dissipation in 3D IC Packaging. In: Li, Y., Goyal, D. (eds) 3D Microelectronic Packaging. Springer Series in Advanced Microelectronics, vol 57. Springer, Cham. https://doi.org/10.1007/978-3-319-44586-1_10

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  • DOI: https://doi.org/10.1007/978-3-319-44586-1_10

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