Skip to main content

A DTMC Model for Performance Evaluation of Irregular Interconnection Networks with Asymmetric Spatial Traffic Distributions

  • Conference paper
  • First Online:
Analytical and Stochastic Modelling Techniques and Applications (ASMTA 2016)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 9845))

  • 619 Accesses

Abstract

Several mathematical models have been proposed to evaluate the performance of interconnection networks used for high-speed connections for supercomputers, switches and routers for local and wide area networks, as well as networks on a chip. Often these models are based on state space reduction by exploiting symmetries of the network and requiring uniform traffic patterns. If an interconnection network is built for a specific application with non-uniform spatial traffic distribution, models that are more general are needed. This paper proposes a mathematical model for performance evaluation of application-specific interconnection networks based on inhomogeneous discrete time Markov chains (DTMC). It supports store and forward routing, irregular network topologies, and asymmetric spatial traffic distributions. The model is described in a generalized way so that it can support arbitrary switching element sizes within the network and its input buffers.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Amiri-Zarandi, M., Safaei, F., Roozikhar, M.: Performance evaluation of generic multi-stage interconnection networks with blocking and back-pressure mechanism. J. Supercomputing 71(3), 1038–1066 (2015)

    Article  Google Scholar 

  2. Atiquzzaman, M., Akhtar, M.: Performance of buffered multistage interconnection networks in a nonuniform traffic environment. J. Parallel Distrib. Comput. 30(1), 52–63 (1995)

    Article  Google Scholar 

  3. Dias, D., Jump, J.: Analysis and simulation of buffered delta networks. IEEE Trans. Comput. C-30(4), 273–282 (1981)

    Google Scholar 

  4. Hamid, N., Walters, R.J., Wills, G.B.: An analytical model of multi-core multi-cluster architecture (MCMCA). Open J. Cloud Comput. (OJCC) 2(1), 1–12 (2015)

    Google Scholar 

  5. Kiasari, A., Lu, Z., Jantsch, A.: An analytical latency model for networks-on-chip. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 21(1), 113–123 (2013)

    Article  Google Scholar 

  6. Lüdtke, D., Westerdorff, K., Stohlmann, K., Börner, A., Maibaum, O., Peng, T., Weps, B., Fey, G., Gerndt, A.: OBC-NG: towards a reconfigurable on-board computing architecture for spacecraft. In: 2014 IEEE Aerospace Conference, pp. 1–13, March 2014

    Google Scholar 

  7. Lüdtke, D., Tutsch, D.: The modeling power of CINSim: performance evaluation of interconnection networks. Comput. Netw. 53(8), 1274–1288 (2009)

    Article  MATH  Google Scholar 

  8. Moadeli, M., Shahrabi, A., Vanderbauwhede, W., Ould-Khaoua, M.: An analytical performance model for the spidergon NoC. In: 21st International Conference on Advanced Information Networking and Applications, AINA 2007, pp. 1014–1021, May 2007

    Google Scholar 

  9. Parkes, S., Armbruster, P.: SpaceWire: a spacecraft onboard network for real-time communications. In: 14th IEEE-NPSS Real Time Conference, pp. 6–10 (2005)

    Google Scholar 

  10. Sabbaghi-Nadooshan, R., Patooghy, A.: Analytical performance modeling of de Bruijn inspired mesh-based network-on-chips. Microprocess. Microsyst. 39(1), 27–36 (2015)

    Article  Google Scholar 

  11. Tutsch, D., Hommel, G.: Generating systems of equations for performance evaluation of multistage interconnection networks. J. Parallel Distrib. Comput. (JPDC) 62(2), 228–240 (2002)

    Article  MATH  Google Scholar 

  12. Yoon, H., Lee, K.Y., Liu, M.T.: Performance analysis of multibuffered packet-switching networks in multiprocessor systems. IEEE Trans. Comput. 29(3), 319–327 (1990)

    Article  Google Scholar 

  13. Youn, H.Y., Mun, Y.: On multistage interconnection networks with small clock cycles. IEEE Trans. Parallel Distrib. Syst. 6(1), 86–93 (1995)

    Article  Google Scholar 

  14. Zhou, B., Atiquzzaman, M.: Efficient analysis of multistage interconnection networks using finite output-buffered switching elements. Comput. Netw. ISDN Syst. 28(13), 1809–1829 (1996)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Daniel Lüdtke .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2016 Springer International Publishing Switzerland

About this paper

Cite this paper

Lüdtke, D., Tutsch, D. (2016). A DTMC Model for Performance Evaluation of Irregular Interconnection Networks with Asymmetric Spatial Traffic Distributions. In: Wittevrongel, S., Phung-Duc, T. (eds) Analytical and Stochastic Modelling Techniques and Applications. ASMTA 2016. Lecture Notes in Computer Science(), vol 9845. Springer, Cham. https://doi.org/10.1007/978-3-319-43904-4_14

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-43904-4_14

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-43903-7

  • Online ISBN: 978-3-319-43904-4

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics