Abstract
Dielectric breakdown and its relation to computer chip components and interconnects have been covered in the previous chapters. Multiple theories were presented to describe mechanisms that can result in failure. In addition, it was discussed how such mechanisms can be affected by material properties, fabrication steps, and type of stress. Complex concepts have been reduced to empirical expression and fitting parameters. These methodologies have been shown to replicate experimental data in high-field and high-temperature conditions. However, a great deal of uncertainty remains about whether they can accurately and cohesively describe breakdown behavior and values in device operating conditions. The present chapter will pursue a higher level of understanding about dielectric failure and the fundamental mechanisms that control it. The concepts discussed in previous chapters as well as some novel ideas have been merged to generate a comprehensive physical description of the phenomena. This physical description has been translated into mathematical terms by using transport equations for major species participating in dielectric failure. Our intent is to generate a framework for general dielectric breakdown in nano-porous thin films that can be applied to multiple systems.
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Borja, J.P., Lu, TM., Plawsky, J. (2016). Theory of Dielectric Breakdown in Nano-Porous Thin Films. In: Dielectric Breakdown in Gigascale Electronics. SpringerBriefs in Materials. Springer, Cham. https://doi.org/10.1007/978-3-319-43220-5_7
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DOI: https://doi.org/10.1007/978-3-319-43220-5_7
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