Abstract
To achieve high-volume manufacturing of GaN technology, GaN-on-Si wafers need to be processed in highly efficient and productive CMOS fabs. To achieve this objective, the GaN-on-Si epitaxy and processing technology need to be adapted to the strict standard of CMOS fabs. In this chapter, the challenges related to the growth and (Au-free) processing of 200-mm GaN-on-Si wafers in a CMOS fab are analyzed.
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Marcon, D., Stoffels, S. (2017). GaN-on-Silicon CMOS-Compatible Process. In: Meneghini, M., Meneghesso, G., Zanoni, E. (eds) Power GaN Devices. Power Electronics and Power Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-43199-4_3
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DOI: https://doi.org/10.1007/978-3-319-43199-4_3
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Online ISBN: 978-3-319-43199-4
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