Abstract
In WISA’13, a novel lightweight block cipher named LEA was released. This algorithm has certain useful features for hardware and software implementations, i.e., simple ARX operations, non-S-box architecture, and 32-bit word size. These features are realized in several platforms for practical usage with high performance and low overheads. In this paper, we further improve 128-, 192- and 256-bit LEA encryption for low-end embedded processors. Firstly we present speed optimization methods. The methods split a 32-bit word operation into four byte-wise operations and avoid several rotation operations by taking advantages of efficient byte-wise rotations. Secondly we reduce the code size to ensure minimum code size. We find the minimum inner loops and optimize them in an instruction set level. After then we construct the whole algorithm in a partly unrolled fashion with reasonable speed. Finally, we achieved the fastest LEA implementations, which improves performance by 10.9 % than previous best known results. For size optimization, our implementation only occupies the 280B to conduct LEA encryption. After scaling, our implementation achieved the smallest ARX implementations so far, compared with other state-of-art ARX block ciphers such as SPECK and SIMON.
This work was partly supported by Institute for Information & communications Technology Promotion (IITP) grant funded by the Korea government (MSIP) (No. 10043907, Development of high performance IoT device and Open Platform with Intelligent Software) and the MSIP (Ministry of Science, ICT and Future Planning), Korea, under the ITRC(Information Technology Research Center) support program (IITP-2015-H8501-15-1017) supervised by the IITP (Institute for Information & communications Technology Promotion).
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Notes
- 1.
The 32-bit wise inner loops are optimal choice because each instruction set occupies 2 bytes and 32-bit instruction only needs four consecutive instructions(8 bytes \(=4 \times 2\)) If we use 8-bit instruction as a minimum loop for 32-bit addition, we should use 1 ADD, 1 MOV, 1 INC, 1 CPSE and 1 RJMP and total 10 bytes with far slow performance.
- 2.
The performance is measured in clock cycles and bytes for timing and code size. Precise results are measured in AVR studio and program is complied with optimization level 2.
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Seo, H., Liu, Z., Choi, J., Park, T., Kim, H. (2016). Compact Implementations of LEA Block Cipher for Low-End Microprocessors. In: Kim, Hw., Choi, D. (eds) Information Security Applications. WISA 2015. Lecture Notes in Computer Science(), vol 9503. Springer, Cham. https://doi.org/10.1007/978-3-319-31875-2_3
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DOI: https://doi.org/10.1007/978-3-319-31875-2_3
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