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Two-Stage Approach for Compact and Efficient Low Power from the Mains

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Book cover High-Ratio Voltage Conversion in CMOS for Efficient Mains-Connected Standby

Part of the book series: Analog Circuits and Signal Processing ((ACSP))

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Abstract

This chapter continues the investigation of Chaps. 3 and 4, but introduces an alternative solution approach to realize the same goal of extracting relatively low amounts of power from the mains into a low DC voltage, and this at high efficiency.

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  1. Kessel-Lo, Belgium

    Hans Meyvaert

  2. Leuven, Belgium

    Michiel Steyaert

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Meyvaert, H., Steyaert, M. (2016). Two-Stage Approach for Compact and Efficient Low Power from the Mains. In: High-Ratio Voltage Conversion in CMOS for Efficient Mains-Connected Standby. Analog Circuits and Signal Processing. Springer, Cham. https://doi.org/10.1007/978-3-319-31207-1_5

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