FPGA-Prototyping with Advanced Fault Injection Methodology for Tolerant Computing Systems Simulation

Abstract

The definition of architecture fault-tolerant high-performance VLSI-based distributed computing systems is an important task and requires reasonable modeling at the design stage. One of the methods of generating faults and failures is the method of fault injection. The paper proposes a advanced fault injection technique, involving the use of determine the most likely negative externalities and the response of the system to them. This gives the possibility to determine the threat list, i.e. a list of elements, all of which were violated. In this article the concept of universal hardware-software complex FPGA-based prototyping to simulate the operation of the system and monitor of the device under test work correctness “on the fly”. This approach has more flexibility compared to the traditional and allows you to use more complex patterns in the modeling. It also allows simulation of operation fault-tolerant systems in terms of fault injection.