Advertisement

Evolutionary Approximation of Edge Detection Circuits

  • Petr DvoracekEmail author
  • Lukas Sekanina
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9594)

Abstract

Approximate computing exploits the fact that many applications are inherently error resilient which means that some errors in their outputs can safely be exchanged for improving other parameters such as energy consumption or operation frequency. A new method based on evolutionary computing is proposed in this paper which enables to approximate edge detection circuits. Rather than evolving approximate edge detectors from scratch, key components of existing edge detector are replaced by their approximate versions obtained using Cartesian Genetic Programming (CGP). Various approximate edge detectors are then composed and their quality is evaluated using a database of images. The paper reports interesting edge detectors showing a good tradeoff between the quality of edge detection and implementation cost.

Keywords

Edge detection circuits Cartesian genetic programming Evolutionary computation 

Notes

Acknowledgements

This work was supported by the Czech science foundation project GA16-17538S.

References

  1. 1.
    Esmaeilzadeh, H., Sampson, A., Ceze, L., Burger, D.: Neural acceleration for general-purpose approximate programs. Commun. ACM 58(1), 105–115 (2015)CrossRefGoogle Scholar
  2. 2.
    Fu, W., Johnston, M., Zhang, M.: Genetic programming for edge detection using multivariate density. In: Proceedings of the 15th Annual Conference on Genetic and Evolutionary Computation, pp. 917–924. ACM (2013)Google Scholar
  3. 3.
    Golonek, T., Grzechca, D., Rutkowski, J.: Application of genetic programming to edge detector design. In: Proceedings of the 2006 IEEE International Symposium on Circuits and Systems, pp. 4683–4686. IEEE (2006)Google Scholar
  4. 4.
    Harding, S., Banzhaf, W.: Genetic programming on GPUs for image processing. Int. J. High Perform. Syst. Archit. 1(4), 231–240 (2008)CrossRefGoogle Scholar
  5. 5.
    Harris, C., Buxton, B.: Evolving edge detectors with genetic programming. In: Proceedings of the First Annual Conference on Genetic Programming, pp. 309–314 (1996)Google Scholar
  6. 6.
    Higuchi, T., Niwa, T., Tanaka, T., Iba, H., de Garis, H., Furuya, T.: Evolving hardware with genetic learning: a first step towards building a Darwin machine. In: Proceedings of the 2nd International Conference on Simulated Adaptive Behaviour, pp. 417–424. MIT Press (1993)Google Scholar
  7. 7.
    Hollingworth, G., Tyrrell, A.M., Smith, S.: Simulation of evolvable hardware to solve low level image processing tasks. In: Poli, R., Voigt, H.-M., Cagnoni, S., Corne, D.W., Smith, G.D., Fogarty, T.C. (eds.) EvoIASP 1999 and EuroEcTel 1999. LNCS, vol. 1596, pp. 46–58. Springer, Heidelberg (1999)CrossRefGoogle Scholar
  8. 8.
    Kogge, P.M., Stone, H.S.: A parallel algorithm for the efficient solution of a general class of recurrence equations. IEEE Trans. Comput. 22, 786–793 (1973)MathSciNetCrossRefzbMATHGoogle Scholar
  9. 9.
    Kulkarni, P., Gupta, P., Ercegovac, M.D.: Trading accuracy for power in a multiplier architecture. J. Low Power Electron. 7(4), 490–501 (2011)CrossRefGoogle Scholar
  10. 10.
    Martin, D., Fowlkes, C., Tal, D., Malik, J.: A database of human segmented natural images and its application to evaluating segmentation algorithms and measuring ecological statistics. In: Proceedings of the 8th International Conference on Computer Vision, vol. 2, pp. 416–423, July 2001Google Scholar
  11. 11.
    Miller, J.F.: Cartesian Genetic Programming. Springer-Verlag, Berlin (2011)CrossRefzbMATHGoogle Scholar
  12. 12.
    Miller, J.F., Smith, S.L.: Redundancy and computational efficiency in cartesian genetic programming. IEEE Trans. Evol. Comput. 10(2), 167–174 (2006)CrossRefGoogle Scholar
  13. 13.
    Monajati, M., Fakhraie, S., Kabir, E.: Approximate arithmetic for low-power image median filtering. Circuits Syst. Signal Process. 34(10), 3191–3219 (2015)CrossRefGoogle Scholar
  14. 14.
    Nepal, K., Li, Y., Bahar, R.I., Reda, S.: Abacus: a technique for automated behavioral synthesis of approximate computing circuits. In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2014, pp. 1–6. EDA Consortium (2014)Google Scholar
  15. 15.
    Priego, B., Bellas, F., Souto, D., Lopez-Pena, F., Duro, R.: Evolving cellular automata for detecting edges in hyperspectral images. In: 2012 IEEE International Conference on Fuzzy Systems (FUZZ-IEEE), pp. 1–6. IEEE (2012)Google Scholar
  16. 16.
    Sekanina, L., Harding, L.S., Banzhaf, W., Kowaliw, T.: Image processing and CGP. In: Miller, J.F. (ed.) Cartesian Genetic Programming, pp. 181–215. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  17. 17.
    Sekanina, L., Vasicek, Z.: Approximate circuits by means of evolvable hardware. In: 2013 IEEE International Conference on Evolvable Systems. Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI), pp. 21–28. IEEE CIS (2013)Google Scholar
  18. 18.
    Shi, K., Boland, D., Stott, E., Bayliss, S., Constantinides, G.: Datapath synthesis for overclocking: online arithmetic for latency-accuracy trade-offs. In: 51st ACM/EDAC/IEEE Design Automation Conference (DAC), pp. 1–6. IEEE (2014)Google Scholar
  19. 19.
    Sonka, M., Hlavac, V., Boyle, R.: Image Processing: Analysis and Machine Vision. Thomson-Engineering, Toronto (1999)Google Scholar
  20. 20.
    Torresen, J.: A scalable approach to evolvable hardware. Genet. Program Evolvable Mach. 3(3), 259–282 (2002)CrossRefzbMATHGoogle Scholar
  21. 21.
    Ttofis, C., Hadjitheophanous, S., Georghiades, A., Theocharides, T.: Edge-directed hardware architecture for real-time disparity map computation. IEEE Trans. Comput. 62(4), 690–704 (2013)MathSciNetCrossRefGoogle Scholar
  22. 22.
    Vasicek, Z., Sekanina, L.: An evolvable hardware system in Xilinx Virtex II Pro FPGA. Int. J. Innovative Comput. Appl. 1(1), 63–73 (2007)CrossRefGoogle Scholar
  23. 23.
    Vasicek, Z., Sekanina, L.: Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware. Genet. Program Evolvable Mach. 12(3), 305–327 (2011)CrossRefGoogle Scholar
  24. 24.
    Vasicek, Z., Sekanina, L.: Circuit approximation using single- and multi-objective cartesian GP. In: Machado, P., et al. (eds.) EuroGP. LNCS, vol. 9025, pp. 217–229. Springer International Publishing, Switzerland (2015)Google Scholar
  25. 25.
    Vasicek, Z., Sekanina, L.: Evolutionary approach to approximate digital circuits design. IEEE Trans. Evol. Comput. 19(3), 432–444 (2015)CrossRefGoogle Scholar
  26. 26.
    Yazdanbakhsh, A., Mahajan, D., Thwaites, B., Park, J., Nagendrakumar, A., Sethuraman, S., Ramkrishnan, K., Ravindran, N., Jariwala, R., Rahimi, A., Esmaeilzadeh, H., Bazargan, K.: Axilog: language support for approximate hardware design. In: Design, Automation Test in Europe Conference Exhibition (DATE 2015), pp. 812–817. IEEE (2015)Google Scholar
  27. 27.
    Zhang, Y., Rockett, P.I.: Evolving optimal feature extraction using multiobjective genetic programming: a methodology and preliminary study on edge detection. In: Proceedings of the 2005 Conference on Genetic and Evolutionary Computation, GECCO 2005, pp. 795–802. ACM (2005)Google Scholar

Copyright information

© Springer International Publishing Switzerland 2016

Authors and Affiliations

  1. 1.Faculty of Information Technology, IT4Innovations Centre of ExcellenceBrno University of TechnologyBrnoCzech Republic

Personalised recommendations