Abstract
The analysis in Chap. 8 had shown that decreasing threshold voltages increase the critical charge of logic circuits thus providing more robustness to radiation transients and soft delay effects. In a normal dynamic threshold MOS (DTMOS) scheme, the body-source junction is “forward biased” (at less than 0.6 V), forcing the threshold voltage to drop and hence this lower threshold effect can be exploited for SE transient and soft delay mitigation. This chapter compares various DTMOS inverter schemes for soft error and soft delay tolerance to find that the standard DTMOS scheme offers the best radiation tolerance. The chapter then presents a soft error mitigation methodology based on the combined use of the standard DTMOS scheme along with driver sizing. Results indicate that the combine approach mitigates SE transients and soft delays with lot more area efficiency than driver sizing taken alone.
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Sayil, S. (2016). Dynamic Threshold Technique for Soft Error and Soft Delay Mitigation. In: Soft Error Mechanisms, Modeling and Mitigation . Springer, Cham. https://doi.org/10.1007/978-3-319-30607-0_9
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DOI: https://doi.org/10.1007/978-3-319-30607-0_9
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