Abstract
Emerging web applications like cloud computing, Big Data and social networks have created the need for powerful centres hosting hundreds of thousands of servers. Currently, the data centres are based on general purpose processors that provide high flexibility buts lack the energy efficiency of customized accelerators. VINEYARD aims to develop an integrated platform for energy-efficient data centres based on new servers with novel, coarse-grain and fine-grain, programmable hardware accelerators. It will, also, build a high-level programming framework for allowing end-users to seamlessly utilize these accelerators in heterogeneous computing systems by employing typical data-centre programming frameworks (e.g. MapReduce, Storm, Spark, etc.). This programming framework will, further, allow the hardware accelerators to be swapped in and out of the heterogeneous infrastructure so as to offer high flexibility and energy efficiency. VINEYARD will foster the expansion of the soft-IP core industry, currently limited in the embedded systems, to the data-centre market. VINEYARD plans to demonstrate the advantages of its approach in three real use-cases (a) a bio-informatics application for high-accuracy brain modeling, (b) two critical financial applications, and (c) a big-data analysis application.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Cisco Visual Networking Index: Global Mobile Data Traffic Forecast Update, 2014–2019. White Paper, Cisco, Inc
Esmaeilzadeh, H., Blem, E., Amant, R.S., Sankaralingam, Karthikeyan, Burger, Doug: Power challenges may end the multicore era. Commun. ACM 56(2), 93–102 (2013)
Esmaeilzadeh, H., Blem, E., St, R., Amant, K.S., Burger, D.: Dark silicon and the end of multicore scaling. In: Proceedings of the 38th Annual International Symposium on Computer Architecture, ISCA 2011, pp. 365–376. ACM, New York (2011)
Hardavellas, N., Ferdman, M., Falsafi, B., Ailamaki, A.: Toward dark silicon in servers. IEEE Micro 31(4), 6–15 (2011)
Lindtjorn, O., Clapp, R., Pell, O., Haohuan, F., Flynn, M., Mencer, O.: Beyond traditional microprocessors for geoscience high-performance computing applications. IEEE Micro 31(2), 41–49 (2011)
Weston, S., Spooner, J., Racaniere, S., Mencer, O.: Rapid computation of value and risk for derivatives portfolios. Concurr. Comput. Pract. Exper. 24(8), 880–894 (2012)
Clark, D. Maxeler makes waves with dataflow design. Wall Street J. Blog 13 (2011)
Bueno, J., Martorell, X., Badia, R.M., Ayguadé, E., Labarta, J.: Implementing OmpSs support for regions of data in architectures with multiple address spaces. In: Proceedings of the 27th International ACM Conference on International Conference on Supercomputing, ICS 2013, pp. 359–368. ACM, New York (2013)
Shan, Y., Wang, B., Jing Yan, Y., Wang, N.X., Yang, H.: FPMR: MapReduce framework on FPGA. In: Proceedings of the 18th Annual ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2010, pp. 93–102. ACM, New York (2010)
Athanas, P., Kepa, K., Shagrithaya, K.: Enabling development of OpenCL applications on FPGA platforms. In: Proceedings of the IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), ASAP 2013, pp. 26–30. IEEE Computer Society, Washington, DC (2013)
Owaida, M., Bellas, N., Daloukas, K., Antonopoulos, C.D.: Synthesis of platform architectures from OpenCL programs. In: Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011, pp. 186–193. IEEE Computer Society, Washington, DC (2011)
Pan, H., Hindman, B., Asanović, K.: Composing parallel software efficiently with lithe. In: Proceedings of the 31st ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2010, pp. 376–387. ACM, New York (2010)
Becchi, M., Sajjapongse, K., Graves, I., Procter, A., Ravi, V., Chakradhar, S.: A virtual memory based runtime to support multi-tenancy in clusters with GPUs. In: Proceedings of the 21st International Symposium on High-Performance Parallel and Distributed Computing, HPDC 2012, pp. 97–108. ACM, New York (2012)
Wang, W., Bolic, M., Parri, J.: pvFPGA: accessing an FPGA-based hardware accelerator in a paravirtualized environment. In: Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2013, pp. 10:1–10:9. IEEE Press, Piscataway (2013)
Chen, F., Shan, Y., Zhang, Y., Wang, Y., Franke, H., Chang, X., Wang, K.: Enabling FPGAs in the cloud. In: Proceedings of the 11th ACM Conference on Computing Frontiers, CF 2014, pp. 3:1–3:10. ACM, New York (2014)
Smaragdos, G., Isaza, S., van Eijk, M.F., Sourdis, I., Strydis, C.: FPGA-based biophysically-meaningful modeling of Olivocerebellar neurons. In: Proceedings of the ACM/SIGDA International Symposium on Field-programmable Gate Arrays, FPGA 2014, pp. 89–98. ACM, New York (2014)
Acknowledgment
This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 687628.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2016 Springer International Publishing Switzerland
About this paper
Cite this paper
Kachris, C. et al. (2016). The VINEYARD Approach: Versatile, Integrated, Accelerator-Based, Heterogeneous Data Centres. In: Bonato, V., Bouganis, C., Gorgon, M. (eds) Applied Reconfigurable Computing. ARC 2016. Lecture Notes in Computer Science(), vol 9625. Springer, Cham. https://doi.org/10.1007/978-3-319-30481-6_1
Download citation
DOI: https://doi.org/10.1007/978-3-319-30481-6_1
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-30480-9
Online ISBN: 978-3-319-30481-6
eBook Packages: Computer ScienceComputer Science (R0)