Abstract
Data races are among the most difficult software bugs to discover. They arise from multiple threads accessing the same memory location, a situation which is often hard to discern from source code alone. Detection of such bugs is further complicated by individual CPUs’ use of relaxed memory models. As a matter of fact, proving absence of data races is a typical task for automated formal verification. In this paper, we present a new approach for verification of multi-threaded C and C++ programs under weakened memory models (using store buffer emulation), using an unmodified model checker that assumes Sequential Consistency. In our workflow, a C or C++ program is translated into LLVM bitcode, which is then automatically extended with store buffer emulation. After this transformation, the extended LLVM bitcode is model-checked against safety and/or liveness properties with our explicit-state model checker DIVINE.
This work has been partially supported by the Czech Science Foundation Grant no. 15-08772S.
P. Ročkai—The contribution of Petr Ročkai has been partially supported by Red Hat, Inc.
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Štill, V., Ročkai, P., Barnat, J. (2016). Weak Memory Models as LLVM-to-LLVM Transformations. In: Kofroň, J., Vojnar, T. (eds) Mathematical and Engineering Methods in Computer Science. MEMICS 2015. Lecture Notes in Computer Science(), vol 9548. Springer, Cham. https://doi.org/10.1007/978-3-319-29817-7_13
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