Abstract
In this chapter we address the physical design of the flow layer, which consists of the placement and routing tasks. Placement decides the location of components on the chip, and routing decides the channels interconnecting the components, and their layout on the chip. The physical design of the control layer is presented in the next chapter. We present several algorithms for placement and routing. Placement is solved using a simulated annealing-based metaheuristic, and we propose several cost functions to evaluate the fitness of a placement solution. For routing, we adapt several algorithms from the microelectronics VLSI literature and show how they can be applied to mVLSI biochips. The proposed algorithms are evaluated using several benchmarks.
Chapter co-author: Michael Lander Raagaard
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Pop, P., Minhass, W.H., Madsen, J. (2016). Placement and Routing. In: Microfluidic Very Large Scale Integration (VLSI). Springer, Cham. https://doi.org/10.1007/978-3-319-29599-2_9
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DOI: https://doi.org/10.1007/978-3-319-29599-2_9
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Publisher Name: Springer, Cham
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Online ISBN: 978-3-319-29599-2
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