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Recognizing and Drawing IC-Planar Graphs

  • Franz J. Brandenburg
  • Walter Didimo
  • William S. Evans
  • Philipp KindermannEmail author
  • Giuseppe Liotta
  • Fabrizio Montecchiani
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9411)

Abstract

IC-planar graphs are those graphs that admit a drawing where no two crossed edges share an end-vertex and each edge is crossed at most once. They are a proper subfamily of the 1-planar graphs. Given an embedded IC-planar graph G with n vertices, we present an O(n)-time algorithm that computes a straight-line drawing of G in quadratic area, and an \(O(n^3)\)-time algorithm that computes a straight-line drawing of G with right-angle crossings in exponential area. Both these area requirements are worst-case optimal. We also show that it is \(\mathrm {NP}\)-complete to test IC-planarity both in the general case and in the case in which a rotation system is fixed for the input graph. Furthermore, we describe a polynomial-time algorithm to test whether a set of matching edges can be added to a triangulated planar graph such that the resulting graph is IC-planar.

1 Introduction

The study of graphs that are, in some sense, “nearly-planar”, is an emerging topic in graph theory, graph algorithms, and network visualization. The general framework is to relax the planarity constraint by allowing edge crossings but still forbidding those configurations that would affect the readability of the drawing too much. Different types of forbidden edge-crossing configurations give rise to different families of nearly-planar graphs. For example, if the number of crossings per edge is bounded by a constant k, we have the family of k -planar graphs (see, e.g., [2, 23]). The k -quasi-planar graphs admit drawings with no k pairwise crossing edges (see, e.g., [15, 20]). RAC (Right Angle Crossing) graphs can be drawn such that edges cross only at right angles (see, e.g., [17, 19]). Generalizations of RAC drawings are ACE \(_\alpha \) and ACL \(_\alpha \) drawings, where the edges can cross only at an angle that is exactly \(\alpha \) or at least \(\alpha \), respectively, where \(\alpha \in (0,\pi /2]\); see [18] for a survey. Further families of nearly-planar graphs are fan-crossing free graphs [11] and fan-planar graphs [6, 7, 24]. Most of the existing literature on nearly-planar graphs can be classified according to the study of the following problems (see also [27] for additional references).

Coloring Problem: While the chromatic number of planar graphs is four, it is rather natural to ask what restrictions on the crossing configurations force the chromatic number of a graph to be relatively small. For example, Borodin [8] proves that the chromatic number of 1-planar graphs is six.

Turán-type Problem: The question here is to determine how many edges a nearly-planar graph can have. In particular, it is known that all the families of nearly-planar graphs mentioned above are rather sparse (see, e.g., [1, 9, 17, 20, 24, 28]).

Recognition Problem: In contrast to planarity testing, recognizing a nearly-planar graph has often been proved to be \(\mathrm {NP}\)-hard. This is for example the case for 1-planar graphs [25], RAC graphs [3], and fan-planar graphs [6, 7]. For some constrained classes of nearly-planar graphs, polynomial-time tests exist (e.g., [4, 22]).

Drawing Algorithms: Some recent papers describe drawing algorithms for different families of nearly-planar graphs; the majority of them focuses on drawings with straight-line edges and often considers the interplay with other readability constraints, such as compact area. A limited list of examples includes [2, 14, 16].

Inclusion/intersection Relationships: Relationships between different classes of nearly-planar graphs are also proved, as a fundamental step towards developing a comprehensive theory of graph drawing beyond planarity (see, e.g., [7, 19]).

This paper studies IC-planar graphs, which stands for Independent Crossings graphs, i.e., graphs that admit a drawing where no two crossed edges share an end-vertex and each edge is crossed at most once. They are 1-planar graphs with the additional property that all crossing edges form an independent set. Král and Stacho [26] exploited this property to show that they have chromatic number at most five. Zhang and Liu [31] study the Turán-type problem and prove that they have at most \(13n/4-6\) edges, which is a tight bound. Zhang [30] studies so-called plane graphs with near independent crossings (NIC-planar graphs), that is, each pair of crossing edges shares at most one endpoint, and states the computational complexity of recognizing IC-planar graphs as an open problem.

We extend the theory on IC-planarity beyond the already studied coloring and Turán-type problems. We investigate drawing algorithms, the complexity of the recognition problem, and the interplay between IC-planar graphs and other families of nearly-planar graphs. Our results are as follows.

(i) We present an O(n)-time algorithm that computes a straight-line drawing of an embedded IC-planar graph with n vertices in \(O(n^2)\) area, which is worst-case optimal (Theorem 1). It may be worth recalling that not all 1-planar graphs admit a straight-line drawing [29] and that there are embedded 1-planar graphs that require \(\varOmega (2^n)\) area [23].

(ii) We prove that IC-planarity testing is \(\mathrm {NP}\)-complete both in the variable embedding setting (Theorem 2) and when the rotation system of the graph is fixed (Theorem 3). Note that 1-planarity testing is already known to be \(\mathrm {NP}\)-complete in general [25], even if the rotation system is fixed [5]. In addition to the hardness result, we present a polynomial-time algorithm that tests whether a set of matching edges can be added to a triangulated plane graph such that the resulting graph is IC-planar (Theorem 4). We remark that in any IC-planar drawing the set of crossing edges form a matching.

(iii) We study the interplay between IC-planar graphs and RAC graphs. Namely, we show that every IC-planar graph is a RAC graph (Theorem 5), which sheds new light on an open problem about the relationship between 1-planar graphs and RAC graphs [19]. We also prove that a straight-line RAC drawing of an IC-planar graph may require \(\varOmega (q^n)\) area, for a suitable constant \(q > 1\) (Theorem 6).

2 Preliminaries

We consider simple undirected graphs G. A drawing \(\varGamma \) of G maps the vertices of G to distinct points in the plane and the edges of G to simple Jordan curves between their end-points. If the vertices are drawn at integer coordinates, \(\varGamma \) is a grid drawing. \(\varGamma \) is planar if no edges cross, and 1-planar if each edge is crossed at most once. \(\varGamma \) is IC-planar if it is 1-planar and there are no crossing edges that share a vertex (see Fig. 1(a)).
Fig. 1.

(a) An IC-planar drawing. (b) Two different IC-planar embeddings of the same graph with the same rotation system. (c) An X-configuration. (d) A B-configuration

A planar drawing \(\varGamma \) of a graph G induces an embedding, which is the class of topologically equivalent drawings. In particular, an embedding specifies the regions of the plane, called faces, whose boundary consists of a cyclic sequence of edges. The unbounded face is called the outer face. For a 1-planar drawing, we can still derive an embedding considering that the boundary of a face may consist also of edge segments from a vertex to a crossing point. A graph with a given planar (1-planar, IC-planar) embedding is called a plane (1-plane, IC-plane) graph. A rotation system \(\mathcal {R}(G)\) of a graph G describes a possible cyclic ordering of the edges around the vertices. \(\mathcal {R}(G)\) is planar (1-planar, IC-planar) if G admits a planar (1-planar, IC-planar) embedding that preserves \(\mathcal {R}(G)\). Observe that \(\mathcal {R}(G)\) can directly be retrieved from a drawing or an embedding. The converse does not necessarily hold, as shown in Fig. 1(b).

A kite K is a graph isomorphic to \(K_4\) with an embedding such that all the vertices are on the boundary of the outer face, the four edges on the boundary are planar, and the remaining two edges cross each other; see Fig. 1(c). Thomassen [29] characterized the possible crossing configurations that occur in a 1-planar drawing. Applying this characterization to IC-planar drawings gives rise to the following property, where an X-crossing is of the type described in Fig. 1(c) (the crossing is “inside” the cycle), and a B-crossing is of the type described in Fig. 1(d) (without the dotted edge; the crossing is “outside” the cycle).

Property 1

Every crossing of an IC-planar drawing is either an X- or a B-crossing.

Let G be a plane (1-plane, IC-plane) graph. G is maximal if no edge can be added without violating planarity (1-planarity, IC-planarity). A planar (1-planar, IC-planar) graph G is maximal if every planar (1-planar, IC-planar) embedding is maximal. If we restrict to 1-plane (IC-plane) graphs, we say that G is planar-maximal if no edge can be added without creating at least an edge crossing on the newly added edge (or making the graph not simple). We call the operation of adding edges to G until it becomes planar-maximal a planar-maximal augmentation.

3 Straight-Line Drawings of IC-Planar Graphs

We show that every IC-planar graph admits an IC-planar straight-line grid drawing in quadratic area, and this area is worst-case optimal (Theorem 1). The result is based on first using a new technique that possibly augments the input graph to a maximal IC-plane graph (the resulting embedding might be different from the original one) with specific properties (Lemma 1), and then suitably applying a drawing algorithm by Alam et al. for triconnected 1-plane graphs [2] on the augmented graph. We say that a kite (abcd) with crossing edges (ad) and (bc) is empty if it contains no other vertices, that is, the edges (ac), (ad), and (ab) are consecutive in the counterclockwise order around a; see Fig. 2(b). The condition for the edges around b, c, and d is analogous.

Lemma 1

Let \(G=(V,E)\) be an IC-plane graph with \(n\) vertices. There exists an \(O(n)\)-time algorithm that computes a planar-maximal IC-plane graph \(G^+ = (V, E^+)\) with \(E \subseteq E^+\) such that the following conditions hold:
(c1)

The four endvertices of each pair of crossing edges induce a kite.

(c2)

Each kite is empty.

(c3)

Let \(C\) be the set of crossing edges in \(G^+\). Let \(C^* \subset C\) be a subset containing exactly one edge for each pair of crossing edges. Then \(G^+ \setminus C^*\) is plane and triangulated.

(c4)

The outer face of \(G^+\) is a \(3\)-cycle of non-crossed edges.

 
Fig. 2.

Illustration for the proof of Lemma 1

Proof

Let G be an IC-plane graph; we augment G by adding edges such that for each pair of crossing edges (ad) and (bc) the subgraph induced by vertices \(\{a,b,c,d\}\) is isomorphic to \(K_4\); see the dashed edges in Figs. 1(c) and (d). Next, we want to make sure that this subgraph forms an X-configuration and the resulting kite is empty. Since G is IC-planar, it has no two B-configurations sharing an edge. Thus, we remove a B-configuration with vertices \(\{a,b,c,d\}\) by rerouting the edge (ab) to follow the edge (ad) from vertex a until the crossing point, then edge (bc) until vertex b, as shown by the dotted edge in Fig. 1(d). This is always possible, because edges (ac) and (bd) only cross each other; hence, following their curves, we do not introduce any new crossing. The resulting IC-plane graph satisfies (c1) (recall that, by Property 1, only X- and B-configurations are possible). Now, assume that a kite \(\{a,b,c,d\}\) is not empty; see Fig. 2(a). Following the same argument as above, we can reroute the edges (ab), (bd), (cd) and (ad) to follow the crossing edges (ad) and (bc); see Fig. 2(b). The resulting IC-plane graph is denoted by \(G'\) and satisfies (c2).

We now augment \(G'\) to \(G^+\), such that (c3) is satisfied. Let C be the set of all pairs of crossing edges in \(G'\). Let \(C^*\) be a subset constructed from C by keeping only one (arbitrary) edge for each pair of crossing edges. The graph \(G' \setminus C^*\) is clearly plane. To ensure (c3), graph \(G^+ \setminus C^*\) must be plane and triangulated. Because \(G'\) satisfies (c2), each removed edge spans two triangular faces in \(G' \setminus C^*\). Thus, no face incident to a crossing edge has to be triangulated. We internally triangulate the other faces by picking any vertex on its boundary and connecting it to all other vertices (avoiding multiple edges) of the boundary; see e.g. Fig. 2(c). Graph \(G^+\) is then obtained by reinserting the edges in \(C^*\) and satisfies (c3). To satisfy (c4), notice that \(G^+\) is IC-plane, hence, it has a face f whose boundary contains only non-crossed edges. Also, f is a 3-cycle by construction. Thus, we can re-embed \(G^+\) such that f is the outer face. Since IC-planar graphs are sparse [31], each step can clearly be done in O(n) time. \(\square \)

Theorem 1

There is an O(n)-time algorithm that takes an IC-plane graph G with n vertices as input and constructs an IC-planar straight-line grid drawing of G in \(O(n) \times O(n)\) area. This area is worst-case optimal.

Sketch of Proof

Augment G into a planar-maximal IC-plane graph \(G^+\) in O(n) time using Lemma 1. Graph \(G^+\) is triconnected, as it contains a triangulated plane subgraph. Draw \(G^+\) with the algorithm by Alam et al. [2] which takes as input a 1-plane triconnected graph with n vertices and computes a 1-planar drawing on the \((2n -2 )\times (2n-3)\) grid in O(n) time; this drawing is straight-line, but for the outer face, which may contain a bent edge if it has two crossing edges. By Lemma 1 the outer face of \(G^+\) has no crossed edges, so \(\varGamma \) is straight-line and IC-planar. Dummy edges are then removed from \(\varGamma \). The proof that the area is worst-case optimal is given in the full version [10]. \(\square \)

4 Recognizing IC-Planar Graphs

The IC-planarity testing problem asks if a graph G admits an IC-planar embedding.

Hardness of the Problem. The next theorem shows that IC-planarity testing is \(\mathrm {NP}\)-complete. The full proof is given in the full version of the paper [10].

Theorem 2

IC-planarity testing is \(\mathrm {NP}\)-complete.

Fig. 3.

Reduction from 1-planarity to IC-planarity. Dummy vertices are unfilled

Sketch of Proof. IC-planarity is in \(\mathrm {NP}\), as one can guess an embedding and check whether it is IC-planar [21]. For the hardness proof, the reduction is from the 1-planarity testing problem, which asks whether a given graph is 1-planar or not. The reduction uses a 3-cycle gadget and exploits the fact that at most one edge of a 3-cycle is crossed in an IC-planar drawing. We transform an instance G of 1-planarity testing into an instance \(G^*\) of IC-planarity testing, by replacing each edge (uv) of G with a graph \(G_{uv}\) consisting of two 3-cycles, \(T_{uv}\) and \(T_{vu}\), with vertices \(\{u, c_{uv}, a_{uv}\}\) and \(\{v, c_{vu}, a_{vu}\}\), respectively, plus edge \((a_{uv},a_{vu})\), called the attaching edge of u and v; see Fig. 3.

Let \(\varGamma \) be a 1-planar drawing of G. An IC-planar drawing \(\varGamma ^*\) of \(G^*\) can be easily constructed by replacing each curve representing an edge (uv) in \(\varGamma \) with a drawing of \(G_{uv}\) where \(T_{uv}\) and \(T_{vu}\) are drawn planar and sufficiently small, such that the possible crossing that occurs on the edge (uv) in \(\varGamma \) occurs on the attaching edge \((a_{uv},a_{vu})\) in \(\varGamma ^*\). Hence, since all the attaching edges are independent, \(\varGamma ^*\) is IC-planar.

Let \(\varGamma ^*\) be an IC-planar drawing of \(G^*\). We show that it is possible to transform the drawing in such a way that all crossings occur only between attaching edges. Once this condition is satisfied, in order to construct a 1-planar drawing \(\varGamma \) of G, it suffices to remove, for each edge (uv), the vertices \(c_{uv}\) and \(c_{vu}\), and to replace \(a_{uv}\) and \(a_{vu}\) with a bend point. Namely, as already observed, no more than one edge can be crossed for every gadget \(T_{uv}\) of \(G^*\). If an edge incident to a dummy vertex is crossed, then we can reroute this edge to remove the crossing. \(\square \)

Note that this construction does not work for IC-planarity testing with a given rotation system since the rerouting step changes the rotation system. However, we show that IC-planarity testing is \(\mathrm {NP}\)-hard even if the rotation system of the input graph is fixed. The reduction is from planar-3SAT. We exploit the membrane technique introduced in [5] for the hardness proof of 1-planarity testing with fixed rotation system. The main issue is to design suitable gadgets for IC-planar graphs. The proof is given in the full version of the paper [10].

Theorem 3

IC-planarity testing with given rotation system is \(\mathrm {NP}\)-complete.

Fig. 4.

(a) A triconnected graph T (solid) and its dual \(T^*\) (dotted), (b) The extended graph \(T^*\cup \{u^*,v^*\}\) and the three length-3 paths between \(u^*\) and \(v^*\) (bold). (c) The ordered routing edges \(e_1,\ldots ,e_k\) lie inside the quadrangle \((u,l_{uv},v,r_{uv})\)

Polynomial-time Test for a Triangulated Plane Graph Plus a Matching. On the positive side, we now describe an \(O(n^3)\)-time algorithm to test whether a graph \(G=(V,E_T \cup E_M)\) that consists of a triangulated plane graph \(T=(V,E_T)\) and a matching \(M=(V_M,E_M)\) with \(V_M\subseteq V, E_M\cap E_T=\emptyset \) admits an IC-planar drawing that preserves the embedding of T. In the positive case the algorithm also computes an IC-planar drawing. An outline of the algorithm is as follows. (1) Check for every matching edge if there is a way to draw it such that it crosses only one edge of T. (2) Split T into subgraphs that form a hierarchical tree structure. (3) Traverse the 4-block tree bottom-up and solve a 2SAT formula for each tree node.

In order to check whether there is a valid placement for each matching edge \((u,v)\in M\), we have to find two adjacent faces, one of which is incident to u, while the other one is incident to v. To this end, we consider the dual \(T^*\) of T that contains a vertex for each face in T that is not incident to a vertex \(w\in V_M\setminus \{u,v\}\), and an edge for each edge in T that separates two faces. Further, we add two additional vertices \(u^*\) and \(v^*\) to \(T^*\) that are connected to all faces that are incident to u and v, respectively. In the resulting graph \(T^*\cup \{u^*,v^*\}\), we look for all paths of length 3 from \(u^*\) to \(v^*\). These paths are equivalent to routing (uv) through two faces that are separated by a single edge. Note that no path of length 1 or 2 can exist, since (i) by construction \(u^*\) and \(v^*\) are not connected by an edge and (ii) if there was a path of length 2 between \(u^*\) and \(v^*\), then u and v would lie on a common face in the triangulated graph T; thus, the edge (uv) would exist both in \(E_T\) and in \(E_M\), which is not possible since \(E_T \cap E_M = \emptyset \). See Fig. 4 for an illustration. If there is an edge that has no valid placement, then G is not IC-planar and the algorithm stops. Otherwise, we save each path that we found as a possible routing for the corresponding edge in M.

Now, we make some observations on the structure of the possible routings of an edge \((u,v)\in M\) that we can use to get a hierarchical tree structure of the graph T. Every routing is uniquely represented by an edge that separates a face incident to u and a face incident to v and that might be crossed by (uv). We call these edges routing edges. Let there be k routing edges for the pair (uv). Each of these edges forms a triangular face with u. From the embedding, we can enumerate the edges by the counterclockwise order of their corresponding faces at u. This gives an ordering \(e_1,\ldots ,e_k\) of the routing edges. Let \(e_1=(l_{uv},l'_{uv})\) and \(e_k=(r'_{uv},r_{uv})\) such that the edge \((u,l_{uv})\) comes before the edge \((u,l'_{uv})\), and the edge \((u,r'_{uv})\) comes before \((u,r_{uv})\) in the counterclockwise order at u. Then, all edges \(e_1,\ldots ,e_k\) lie within the routing quadrangle \((u,l_{uv},v,r_{uv})\); see Fig. 4(c). Note that there may be more complicated structures between the edges, but they do not interfere with the ordering. Denote by \(Q_{uv}=(u,l_{uv},v,r_{uv})\) the routing quadrilateral of the matching edge \((u,v)\in M\). We define the interior \(\mathcal I_{uv}=(\mathcal V_{uv},\mathcal E_{uv})\) as the maximal subgraph of T such that, for every vertex \(w\in \mathcal V_{uv}\), each path from w to a vertex on the outer face of T contains u, \(l_{uv}\), v, or \(r_{uv}\). Consequently, \(Q_{uv}\in \mathcal V_{uv}\). The following lemma states that two interiors cannot overlap. The proof is given in the full version of the paper [10].

Lemma 2

For each pair of interiors \(\mathcal I_{uv},\mathcal I_{ab}\), exactly one of the following conditions holds: (a) \(\mathcal I_{uv}\cap \mathcal I_{ab}=\emptyset \) (b) \(\mathcal I_{uv}\subset \mathcal I_{ab}\) (c) \(\mathcal I_{ab}\subset \mathcal I_{uv}\) (d) \(\mathcal I_{uv}\cap \mathcal I_{ab}=Q_{uv}\cap Q_{ab}\).

By using Lemma 2, we can find a hierarchical structure on the routing quadrilaterals. We construct a directed graph \(H=(V_H,E_H)\) with \(V_H=\{\mathcal I_{uv}\mid (u,v)\in M\}\cup \{G\}\). For each pair \(\mathcal I_{uv},\mathcal I_{xy}\), \(E_H\) contains a directed edge \((\mathcal I_{uv},\mathcal I_{xy})\) if and only if \(\mathcal V_{uv}\subset \mathcal V_{xy}\) and there is no matching edge (ab) with \(\mathcal V_{uv}\subset \mathcal V_{ab}\subset \mathcal V_{xy}\). Finally, we add an edge from each subgraph that has no outgoing edges to G. Each vertex but G only has one outgoing edge. Obviously, this graph contains no (undirected) cycles. Thus, H is a tree.

We will now show how to construct a drawing of G based on H in a bottom-up fashion. We will first look at the leaves of the graph. Let \(\mathcal I_{uv}\) be a vertex of H whose children are all leaves. Let \(\mathcal I_{u_iv_i},\ldots ,\mathcal I_{u_kv_k}\) be these leaves. Since these interiors are all leaves in H, we can pick any of their routing edges. However, the interiors may touch on their boundary, so not every combination of routing edges can be used. Assume that a matching edge \((u_i,v_i),1\le i\le k\) has more than two valid routing edges. Then, we can always pick a middle one, that is, a routing edge that is not incident to \(l_{u_iv_i}\) and \(r_{u_iv_i}\), since this edge will not interfere with a routing edge of another matching edge.

Now, we can create a 2SAT formula to check whether there is a valid combination of routing edges as follows. For the sake of clarity, we will create several redundant variables and formulas. These can easily be removed or substituted by shorter structures to improve the running time. For each matching edge \((u_i,v_i),1\le i\le k\), we create two binary variables \(l_i\) and \(r_i\), such that \(l_i\) is true if and only if the routing edge incident to \(l_{u_iv_i}\) is picked, and \(r_i\) is true if and only if the routing edge incident to \(r_{u_iv_i}\) is picked. If \((u_i,v_i)\) has only one routing edge, then it is obviously incident to \(l_{u_iv_i}\) and \(r_{u_iv_i}\), so we set \(l_{u_iv_i}=r_{u_iv_i}=\texttt {true} \) by adding the clauses \(l_{u_iv_i}\vee \texttt {false} \) and \(r_{u_iv_i}\vee \texttt {false} \). If \((u_i,v_i)\) has exactly two routing edges, the picked routing edge has to be incident to either \(l_{u_iv_i}\) or \(r_{u_iv_i}\), so we add the clauses \(l_{u_iv_i}\vee r_{u_iv_i}\) and \(\lnot l_{u_iv_i}\vee \lnot r_{u_iv_i}\). If \((u_i,v_i)\) has more than two routing edges, we can pick a middle one, so we set \(l_{u_iv_i}=r_{u_iv_i}=\texttt {false} \) by adding the clauses \(\lnot l_{u_iv_i}\vee \texttt {false} \) and \(\lnot r_{u_iv_i}\vee \texttt {false} \). Next, we have to add clauses to forbid pairs of routing edges that can not be picked simultaneously, i.e., they share a common vertex. Consider a pair of matching edges \((u_i,v_i),(u_j,v_j),1\le i,j\le k\). If \(r_{u_iv_i}\)=\(l_{u_jv_j}\), we add the clause \(\lnot r_i\vee \lnot l_j\). For the other three cases, we add an analogue clause.

Now, we use this 2SAT to decide whether the subgraph \(I_{uv}\) is IC-planar, and which routing edges can be used. For each routing edge (ab) of \(I_{uv}\), we solve the 2SAT formula given above with additional constraints that forbid the use of routing edges incident to a and b. To that end, add the following additional clauses: If \(l_{u_iv_i}=a\), add the clause \(\lnot l_i\vee \texttt {false} \). For the other three cases, we add an analogue clause. If this 2SAT formula has no solution, then the subgraph \(\mathcal I_{uv}\) is not IC-planar. Otherwise, there is a solution where you pick the routing edges corresponding to the binary variables. To decide whether a subgraph \(I_{uv}\) whose children are not all leaves is IC-planar, we first compute which of their routing edges can be picked by recursively using the 2SAT formula above. Then, we use the 2SAT formula for \(I_{uv}\) to determine the valid routing edges of \(I_{uv}\). Finally, we can decide whether G is IC-planar and, if yes, get a drawing by solving the 2SAT formula of all children of G. Hence, we give the following (see the full version of the paper [10] for the proof of the time complexity).

Theorem 4

Let \(T=(V,E_T)\) be a triangulated plane graph with \(n\) vertices and let \(M=(V,E_M)\) be a matching. There exists an \(O(n^3)\)-time algorithm to test if \(G=(V,E_T \cup E_M)\) admits an IC-planar drawing that preserves the embedding of \(T\). If the test is positive, the algorithm computes a feasible drawing.

5 IC-Planarity and RAC Graphs

It is known that every n-vertex maximally dense RAC graph (i.e., RAC graph with \(4n-10\) edges) is 1-planar, and that there exist both 1-planar graphs that are not RAC and RAC graphs that are not 1-planar [19]. Here, we further investigate the intersection between the classes of 1-planar and RAC graphs, showing that all IC-planar graphs are RAC. To this aim, we describe a polynomial-time constructive algorithm. The computed drawings may require exponential area, which is however worst-case optimal; indeed, we exhibit IC-planar graphs that require exponential area in any possible IC-planar straight-line RAC drawing. Our construction extends the linear-time algorithm by de Fraysseix et al. that computes a planar straight-line grid drawing of a maximal (i.e., triangulated) plane graph in quadratic area [13]; we call it the dFPP algorithm. We need to recall the idea behind dFPP before describing our extension.

Algorithm dFPP . Let G be a maximal plane graph with \(n \ge 3\) vertices. The dFPP algorithm first computes a suitable linear ordering of the vertices of G, called a canonical ordering of G, and then incrementally constructs a drawing of G using a technique called shift method. This method adds one vertex per time, following the computed canonical ordering and shifting vertices already in the drawing when needed. Namely, let \(\sigma =(v_1,v_2,\dots ,v_n)\) be a linear ordering of the vertices of G. For each integer \(k \in [3, n]\), denote by \(G_k\) the plane subgraph of G induced by the k vertices \(v_1,v_2,\dots ,v_k\) (\(G_n=G\)) and by \(C_k\) the boundary of the outer face of \(G_k\), called the contour of \(G_k\). Ordering \(\sigma \) is a canonical ordering of G if the following conditions hold for each integer \(k \in [3, n]\): (i) \(G_k\) is biconnected and internally triangulated; (ii) \((v_1,v_2)\) is an outer edge of \(G_k\); and (iii) if \(k+1 \le n\), vertex \(v_{k+1}\) is located in the outer face of \(G_k\), and all neighbors of \(v_{k+1}\) in \(G_k\) appear on \(C_k\) consecutively.

We call lower neighbors of \(v_k\) all neighbors \(v_j\) of \(v_k\) for which \(j < k\). Following the canonical ordering \(\sigma \), the shift method constructs a drawing of G one vertex per time. The drawing \(\varGamma _k\) computed at step k is a drawing of \(G_k\). Throughout the computation, the following invariants are maintained for each \(\varGamma _k\), with \(3 \le k \le n\): (I1) \(p_{v_1}=(0,0)\) and \(p_{v_2}=(2k-4,0)\); (I2) \(x(w_1)<x(w_2)<\dots <x(w_t)\), where \(w_1=v_1, w_2,\dots ,w_t=v_2\) are the vertices that appear along \(C_k\), going from \(v_1\) to \(v_2\). (I3) Each edge \((w_i,w_{i+1})\) (for \(i=1,2,\dots ,t-1\)) is drawn with slope either \(+1\) or \(-1\).

More precisely, \(\varGamma _3\) is constructed placing \(v_1\) at (0, 0), \(v_2\) at (2, 0), and \(v_3\) at (1, 1). The addition of \(v_{k+1}\) to \(\varGamma _k\) is executed as follows. Let \(w_p,w_{p+1},\dots ,w_ q\) be the lower neighbors of \(v_{k+1}\) ordered from left to right. Denote by \(\mu (w_p,w_q)\) the intersection point between the line with slope \(+1\) passing through \(w_p\) and the line with slope \(-1\) passing through \(w_q\). Point \(\mu (w_p,w_q)\) has integer coordinates and thus it is a valid placement for \(v_{k+1}\). With this placement, however, \((v_{k+1},w_p)\) and \((v_{k+1},w_q)\) may overlap with  \((w_p,w_{p+1})\) and \((w_{q-1},w_q)\), respectively. To avoid this, a shift operation is applied: \(w_{p+1}\), \(w_{p+2}\),\(\dots \),\(w_{q-1}\) are shifted to the right by 1 unit, and \(w_q, w_{q+1}, \dots , w_t\) are shifted to the right by 2 units. Then \(v_{k+1}\) is placed at point \(\mu (w_p,w_q)\) with no overlap. We recall that, to keep planarity, when the algorithm shifts a vertex \(w_i\) (\(p+1 \le i \le t\)) of \(C_k\), it also shifts some of the inner vertices together with it; for more details on this point refer to [12, 13]. By Invariants (I1) and (I2), the area of the final drawing is \((2n-4) \times (n-2)\).

Our Extension. Let G be an IC-plane graph, and assume that \(G^+\) is the planar-maximal IC-plane graph obtained from G by applying the technique of Lemma 1. Our drawing algorithm computes an IC-planar drawing of \(G^+\) with right-angle crossings, by extending algorithm dFPP. It adds to the classical shift operation move and lift operations to guarantee that one of the crossing edges of a kite is vertical and the other is horizontal. We now give an idea of our technique, which we call RAC-drawer. Details are given in the proof of Theorem 5. Let \(\sigma \) be a canonical ordering constructed from the underlying maximal plane graph of \(G^+\). Vertices are incrementally added to the drawing, according to \(\sigma \), following the same approach as for dFPP. However, suppose that \(K =(a,b,c,d)\) is a kite of \(G^+\), and that a and d are the first and the last vertex of \(\sigma \) among the vertices in K, respectively. Once d has been added to the drawing, the algorithm applies a suitable combination of move and lift operations to the vertices of the kite to rearrange their positions so to guarantee a right-angle crossing. Note that, following the dFPP technique, a was placed at a y-coordinate smaller than the y-coordinate of d. A move operation is then used to shift d horizontally to the same x-coordinate as a (i.e., (ad) becomes a vertical segment in the drawing); a lift operation is used to vertically shift the lower between b and c, such that these two vertices get the same y-coordinates. Both operations are applied so to preserve planarity and to maintain Invariant (I3) of dFPP; however, they do not maintain Invariant (I1), thus the area can increase more than in the dFPP algorithm and may be exponential. The application of move/lift operations on the vertices of two distinct kites do not interfere each other, as the kites do not share vertices in an IC-plane graph. The main operations of the algorithm are depicted in Fig. 5.

Theorem 5

There is a \(O(n^3)\)-time algorithm that takes an IC-plane graph \(G\) with \(n\) vertices as input and constructs a straight-line IC-planar RAC grid drawing of \(G\).

Sketch of Proof

Let \(G^+\) be the augmented graph constructed from G by using Lemma 1. Call \(G'\) the subgraph obtained from \(G^+\) by removing one edge from each pair of crossing edges; \(G'\) is a maximal plane graph (see condition (c3) of Lemma 1). We apply on \(G'\) the shelling procedure used by de Fraysseix et al. to compute a canonical ordering \(\sigma \) of \(G'\) in O(n) time [13]; it goes backwards, starting from a vertex on the outer face of \(G'\) and successively removing a vertex per time from the current contour. However, during this procedure, some edges of \(G'\) can be replaced with some other edges of \(G^+\) that were previously excluded, although \(G'\) remains maximal planar. Namely, whenever the shelling procedure encounters the first vertex d of a kite \(K=(a,b,c,d)\), it marks d as \({{\mathrm{top}}}(K)\), and considers the edge e of K that is missing in \(G'\). If e is incident to d in K, the procedure reinserts it and removes from \(G'\) the other edge of K that crosses e in \(G^+\). If e is not incident to d, the procedure continues without varying \(G'\). We say that \(u\prec v\) if \(\sigma (u)<\sigma (v)\).

We then compute a drawing of \(G^+\) by using the RAC-drawer algorithm. Let vertex \(v=v_{k+1}\) be the next vertex to be placed according to \(\sigma \). Let \(\mathcal {U}(v)\) be the set of lower neighbors of v, and let \(\lambda (v)\) and \(\rho (v)\) be the leftmost and the rightmost vertex in \(\mathcal {U}(v)\), respectively. Also, denote by \(\mathcal {A}_l(v)\) the vertices to the top-left of v, and by \(\mathcal {A}_r(v)\) the vertices to the top-right of v. If v is not \({{\mathrm{top}}}(K)\) for some kite K, then v is placed by following the rules of dFPP, that is, at the intersection of the \(\pm 1\) diagonals through \(\lambda (v)\) and \(\rho (v)\) after applying a suitable shift operation. If \(v = {{\mathrm{top}}}(K)\) for some kite K, the algorithm proceeds as follows. Let \(K = (a,b,c,d)\) with \(v = d = {{\mathrm{top}}}(K)\). The remaining three vertices of K are in \(G_k\) and are consecutive along the contour \(C_k\), as they all belong to \(\mathcal {U}(d)\) (by construction, \(G'\) contains edge (ad)). W.l.o.g., assume that they are encountered in the order \(\{b,a,c\}\) from left to right. Two cases are now possible:

Case 1: \(a \prec b\) and \(a \prec c\). This implies that \(a = \rho (b)\) and \(a = \lambda (c)\). The edges (ab) and (ac) have slope \(-1\) and \(+1\), respectively, as they belong to \(C_k\). We now aim at having b and c at the same y-coordinate, by applying a lift operation. Suppose first that \(r = y(c) - y(b)>0\); see Fig. 5(a). We apply the following steps: (i) Temporarily undo the placement of b and of all vertices in \(\mathcal {A}_l(b)\). (ii) Apply the shift operation to \(\rho (b)=a\) by 2r units to the right, which implies that the intersection of the diagonals through \(\lambda (b)\) and \(\rho (b)\) is moved by r units to the right and by r units above their former intersection point. Hence, b and c are placed at the same y-coordinate; see also Fig. 5(b). (iii) Reinsert the vertices of \(\mathcal {A}_l(b)\) and modify \(\sigma \) accordingly. Namely, by definition, each vertex in \(\mathcal {A}_l(b)\) does not belong to \(\mathcal {U}(b)\) and it is not an inner vertex below b; therefore, vertices in \(\mathcal {A}_l(b)\) can be safely removed. Hence, \(\sigma \) can be modified such that \(b\prec w\) for each \(w\in A_l(b)\). If \(r = y(c) - y(b)<0\), we apply a symmetric operation: (i) Undo the placement of c and of all vertices in \(\mathcal {A}_r(c)\). (ii) Apply the shift operation to \(\rho (c)\) by |2r| additional units to the right. (iii) Reinsert the vertices of \(\mathcal {A}_r(c)\).

Finally, we place d vertically above a. To this aim, we first apply the shift operation according to the insertion step of dFPP. After that, we may need to apply a move operation; see Fig. 5(c). If \(s=x(d)-x(a)>0\), then we apply the shift operation to vertex \(\rho (d)=c\) by 2s units to the right and then place d (see Fig. 5(d)). If \(s=x(d)-x(a)<0\), then we apply the shift operation to vertex \(\lambda (d)=b\) by 2s units to the left and then place d (clearly, the shift operation can be used to operate in the left direction with a procedure that is symmetric to the one that operates in the right direction). Edges (ad) and (bc) are now vertical and horizontal, respectively. In the next steps, their slopes do not change, as their endvertices are shifted only horizontally (they do not belong to other kites); also, a is shifted along with d, as it belongs to \(\mathcal {U}(d)\).

Case 2: \(b \prec a \prec c\). The proof for this case is given in the full version of the paper [10]. Case \(c \prec a \prec b\) is symmetric to Case 2; case \(b \prec c \prec a\) is impossible as K is a kite. The time complexity is also analyzed in the full version. \(\square \)

Fig. 5.

(a-b) The lift operation: (a) Vertex b is r units below c. (b) Lifting b. (c-d) The move operation: (c) Vertex d is s units to the left of b. (d) Moving d

Theorem 5 and the fact that there exist n-vertex RAC graphs with \(4n-10\) edges [17] while an n-vertex IC-planar graph has at most \(13n/4-6\) edges [31] imply that IC-planar graphs are a proper subfamily of RAC graphs. The next result is proved in the full version of the paper [10].

Theorem 6

There exists an infinite family \(\mathcal {G}\) of graphs such that every IC-planar straight-line RAC drawing of an \(n\)-vertex graph \(G\in \mathcal {G}\) requires area \(\varOmega (q^n)\), for some constant \(q>1\).

6 Conclusion

We have shown that every IC-planar graph can be drawn straight-line in quadratic area, although the angle formed by any two crossing edges can be small. Conversely, straight-line RAC drawings of IC-planar graphs may require exponential area. It would be interesting to design algorithms that draw IC-planar graphs in polynomial area and good crossing resolution. Also, although IC-planar graphs are both 1-planar and RAC, a full characterization of the intersection between these two classes is still an open problem. For example, are NIC-planar graphs [30] also RAC graphs?.

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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  • Franz J. Brandenburg
    • 1
  • Walter Didimo
    • 2
  • William S. Evans
    • 3
  • Philipp Kindermann
    • 4
    Email author
  • Giuseppe Liotta
    • 2
  • Fabrizio Montecchiani
    • 2
  1. 1.Universität PassauPassauGermany
  2. 2.Università Degli Studi di PerugiaPerugiaItaly
  3. 3.University of British ColumbiaVancouverCanada
  4. 4.Universität WürzburgWürzburgGermany

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