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Dual Work Function Silicon Nanowire MOS Transistors

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Silicon Nanowire Transistors

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Abstract

In the past, there were several attempts to develop alternative technologies, including molecular technologies that were aimed to replace the current VLSI technology. However, conventional silicon-based technologies prevailed as solid choices over the newcomers for fabricating low power nano devices and circuits without sacrificing high performance. As today’s chips require larger die areas to accommodate complex System-On-Chip (SOC) designs, reducing overall power dissipation has been accepted as the major design objective, replacing the need for faster circuit performance. Recent modeling studies in undoped, double-gated SOI MOS transistors revealed that these transistors could produce an order of magnitude less leakage current compared to conventional bulk silicon MOS transistors for achieving ultra-low power consumption. However, fabricating ultra-thin transistors sandwiched between two gates with adjustable work function is highly questionable in a production environment since both gates have to be made out of metal in order to produce proper threshold voltage and therefore to maintain a healthy circuit operation. Another good candidate is a nano-scale, triple-gated SOI transistors or FINFETs. Recent studies on these devices showed close-to-ideal subthreshold slope and Drain-Induced-Barrier-Lowering (DIBL), both of which are important factors to reduce OFF current and power consumption. Besides these promising technologies, Silicon Nanowire MOS Transistors (SNT) also offer significant reduction in static and dynamic power consumption and compact layout area without sacrificing circuit performance.

This chapter first examines the device design process of dual work function SNTs to achieve minimum power dissipation. It then studies the circuit performance, static and dynamic power figures of basic CMOS logic gates and mega cells built with SNTs.

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Authors and Affiliations

  1. Computer Engineering Department, San Jose State University, San Jose, CA, USA

    Ahmet Bindal

  2. Electrical Engineering Department, San Jose State University, San Jose, CA, USA

    Sotoudeh Hamedi-Hagh

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  1. Ahmet Bindal
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Bindal, A., Hamedi-Hagh, S. (2016). Dual Work Function Silicon Nanowire MOS Transistors. In: Silicon Nanowire Transistors. Springer, Cham. https://doi.org/10.1007/978-3-319-27177-4_1

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  • DOI: https://doi.org/10.1007/978-3-319-27177-4_1

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-27175-0

  • Online ISBN: 978-3-319-27177-4

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