Security Against Hardware Trojan Attacks Through a Novel Chaos FSM and Delay Chains Array PUF Based Design Obfuscation Scheme

Abstract

Hardware Trojan has emerged as a major security concern for integrated circuits. This paper presents a novel design obfuscation scheme against hardware Trojan attacks based on chaos finite state machine (FSM) and delay chains array physical unclonable function (PUF). We exploits the pseudo-random characteristics of the M-sequences to propose a chaos FSM design method which can generate exponentially many random states and transitions to obfuscate the chip’s functional states with low overhead. The chip’s functionalities are locked and obfuscated and would not be functional without a unique key that can only be computed by the designer. We also propose a new PUF construction method, named delay chains array PUF (DAPUF), to extract the unique power-up state for each chip which is corresponding to a unique key sequence. We introduce confusions between delay chains to achieve avalanche effects of the PUF outputs. Thus the proposed DAPUF approach can provide large number of PUF instances with high accuracy and reverse-engineering resistant. Through the proposed obfuscation scheme, the designer can control the IC’s operation modes (chaos mode and normal mode) and functionalities, and can also remotely disable the chips when hardware Trojan insertion is revealed. The functional obfuscation prevents the adversary from understanding the real functionalities of the circuit as well as the real rare events in the internal nodes, thus making it difficult for the adversary to insert hard-to-detect Trojans. It also makes the inserted Trojans become invalid since the Trojans are most likely inserted in the chaos mode and will be activated only in the chaos mode. Both simulation experiments on benchmark circuits and hardware evaluations on FPGA show the security, low overhead and practicality of the proposed method.