Effective Partial Reconfiguration of Logic Controllers Implemented in FPGA Devices

  • Remigiusz WiśniewskiEmail author
  • Monika Wiśniewska
  • Marian Adamski
Part of the Studies in Systems, Decision and Control book series (SSDC, volume 45)


A method of partial reconfiguration of logic controllers implemented in FPGA is presented in the chapter. Only the control memory content is replaced while the rest of the system is not modified. The logic synthesis and implementation are performed only once. Therefore, such a realisation highly accelerates the whole prototyping process. The performed experiments showed that the original bit-stream that is sent to the FPGA can be reduced even over 500 times.


Logic controllers Microprogrammed controllers Partial reconfiguration Memory Control unit Implementation Field Programmable Gate Arrays (FPGA) 


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Authors and Affiliations

  • Remigiusz Wiśniewski
    • 1
    Email author
  • Monika Wiśniewska
    • 1
  • Marian Adamski
    • 1
  1. 1.Faculty of Electrical Engineering, Computer Science and TelecommunicationsUniversity of Zielona GóraZielona GóraPoland

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