Synthesis and Implementation of Parallel Logic Controllers in All Programmable Systems-on-Chip
The chapter is dedicated to the design of logic controllers with customizable behavior in all programmable systems-on-chip in such a way that the desired functionality is defined in software of a processing system and realized in hardware of reconfigurable logic. The controllers implement algorithms described in form of parallel hierarchical graph-schemes that are built in software from predefined modules. Parallel hierarchical circuits of the controllers are mapped to the reconfigurable logic customized from software through high-performance interfaces. The circuits generate control signals to determine the desired functionality of external devices. A number of experiments are done in Xilinx Zynq-7000 microchips and the results are reported.
KeywordsHardware/software architectures Parallel logic controllers Hierarchical finite state machines Hierarchical algorithms Hardware/software interactions
This work was supported by National Funds through FCT—Foundation for Science and Technology, in the context of the project PEst-OE/EEI/UI0127/2014.
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