Abstract
Bluespec SystemVerilog (BSV) is a rule-based language, where hardware is described as object-oriented modules. Other high-level synthesis approaches try to hide the complexity of hardware (clock cycles, data movement, concurrency, etc.) under the appearance of a sequential and centralized execution. Instead, BSV exposes it to the user as an intuitive high-level metaphor. This language is a good candidate for expert hardware designers with a background on Register-Transfer Level (RTL) languages, such as Verilog or VHDL, for designers that have to develop critical hardware components, or for keeping a very tight control over the performance and the resources used. This chapter introduces the basic concepts of Bluespec SystemVerilog.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsReferences
O. Arcas-Abella, G. Ndu, N. Sonmez, M. Ghasempour, A. Armejach, J. Navaridas, W. Song, J. Mawer, A. Cristal, and M. Lujan. An empirical evaluation of high-level synthesis languages and tools for database acceleration. In 2014 24th International Conference on Field Programmable Logic and Applications (FPL), pages 1–8, Sept 2014.
J. C. Hoe and Arvind. Hardware synthesis from term rewriting systems. In L. M. Silveira, S. Devadas, and R. Reis, editors, VLSI: Systems on a Chip, volume 34 of IFIP - The International Federation for Information Processing, pages 595–619. Springer US, 2000.
R. Nikhil. Bluespec System Verilog: Efficient, correct RTL from high level specifications. In Proceedings of the Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE ’04), pages 69–70, June 2004.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2016 Springer International Publishing Switzerland
About this chapter
Cite this chapter
Arcas-Abella, O., Sonmez, N. (2016). Bluespec SystemVerilog. In: Koch, D., Hannig, F., Ziener, D. (eds) FPGAs for Software Programmers. Springer, Cham. https://doi.org/10.1007/978-3-319-26408-0_9
Download citation
DOI: https://doi.org/10.1007/978-3-319-26408-0_9
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-26406-6
Online ISBN: 978-3-319-26408-0
eBook Packages: EngineeringEngineering (R0)