Abstract
Chapter is devoted to hardware reduction based on using many directions of input memory functions in Moore FSMs. Firstly, the hardware reduction methods are proposed for the two-directional Moore FSMs. They are based on the special state assignment allowing the decreasing for the number of literals in sum-of-products representing input memory functions. Next, the design methods are proposed for three-directional Moore FSMs. It is shown that the number of directions can be increased. It leads to simplifying the input memory functions in comparison with the single-directional models. The last part of the Chapter is devoted to combining the replacement of logical conditions with many directions of state codes.
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References
A. Barkalov, Principles of logic optimization for Moore microprogram automaton. Cybernetics and System Analysis 34(1), 54–60 (1998)
E. McCluskey, Logic Design Principles (Prentice Hall, Englewood Cliffs, 1986)
G. De Micheli, Synthesis and Optimization of Digital Circuits (McGraw–Hill, 1994)
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Barkalov, A., Titarenko, L., Kolopienczyk, M., Mielcarek, K., Bazydlo, G. (2016). Hardware Reduction in Multidirectional Moore FSMs. In: Logic Synthesis for FPGA-Based Finite State Machines. Studies in Systems, Decision and Control, vol 38. Springer, Cham. https://doi.org/10.1007/978-3-319-24202-6_6
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DOI: https://doi.org/10.1007/978-3-319-24202-6_6
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Online ISBN: 978-3-319-24202-6
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