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Implementation and Improvement of the Partial Sum Attack on 6-Round AES

  • Francesco AldàEmail author
  • Riccardo Aragona
  • Lorenzo Nicolodi
  • Massimiliano Sala
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 358)

Abstract

The Partial Sum Attack is one of the most powerful attacks, independent of the key schedule, developed in the last 15 years against reduced-round versions of AES. In this chapter, we introduce a slight improvement to the basic attack which lowers the number of chosen plaintexts needed to successfully mount it. Our version of the attack on 6-round AES can be carried out completely in practice, as we demonstrate providing a full implementation. We also detail the structure of our implementation, showing the performances we achieve.

Keywords

Block Cipher Advance Encryption Standard Fourth Round Verification Step Partial Decryption 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Notes

Acknowledgments

Most of the results shown in this work were developed in the first author’s Master’s thesis and he would like to thank the other authors, especially his supervisor (the last author). For interesting discussions, the authors would like to thank Anna Rimoldi.

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Copyright information

© Springer International Publishing Switzerland 2016

Authors and Affiliations

  • Francesco Aldà
    • 1
    Email author
  • Riccardo Aragona
    • 2
  • Lorenzo Nicolodi
    • 3
  • Massimiliano Sala
    • 2
  1. 1.Horst Görtz Institute for IT Security and Faculty of MathematicsRuhr-Universität BochumBochumGermany
  2. 2.Department of MathematicsUniversity of TrentoPovo, TrentoItaly
  3. 3.Independent ResearcherLavisItaly

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