Abstract
Components connected on a Printed Circuit Board (PCB) or System-on-Board (SoB) can now be integrated onto single chip, hence the development of System-on-Chip (SoC) design as depicted in Fig. 4.1 [1]. SoC improves the bandwidth. The leveraged internal/on-chip bandwidth versus external/off-chip bandwidth as shown in Fig. 4.2.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
http://eecs.wsu.edu/~pande/Journal_Papers/Paper_IEEE_Proceedings.pdf
Stallings W (2003) Computer architecture and organization, 6th edn, Eastern economy edition. PHI Learning, New Delhi
Tanenbaum AS (2000) Structured computer organization, 4th edn. Prentice Hall, Upper Saddle River
Hamacher VC, Vranesic Z, Zaky S (1996) Computer organization, 4th edn. McGraw Hill, New York
Mano MM (2001) Computer system architecture. Prentice Hall, New Delhi
Hayes JP (2002) Computer architecture and organization, 3rd edn. McGraw Hill, New York
Mitic M, Stojčev M (2006) An overview of on-chip buses. Ser Elec Energy 19(3):405–428
http://www.engr.colostate.edu/~sudeep/teaching/ppt/lec06_communication1.pdf. (Accessed 2015)
http://facta.junis.ni.ac.rs/eae/fu2k63/stojcev.pdf. (Accessed 2015)
Ahmed AB (2015) High-throughput architecture and routing algorithms towards the design of reliable mesh-based many-core network-on-chip systems. Ph.D. dissertation, The University of Aizu
Pasricha S, Dutt N (2008) On chip communication architecture: system on chip interconnect, Computer architecture. Morgan Kaufmann, Burlington
Murdocca M, Heuring V (2007) Computer architecture and organization
Paret D (1997) The I2C bus: from theory to practice. Wiley, Chichester
ARM (1999) AMBA specification revision 2.0
Patil RP, Sangamkar PV (2015) A review of system-on-chip bus protocols. Int J Adv Res Electr Electron Instrum Eng 4(1):271–281
OpenCores (2011) Wishbone B4: WISHBONE system-on-chip (SOC) interconnection architecture for portable IP cores, 4th ed. cdn.opencores.org/downloads/wbspec_b4.pdf. Accessed 5 November 2011
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2016 Springer International Publishing Switzerland
About this chapter
Cite this chapter
Mohamed, K.S. (2016). SoC Buses and Peripherals: Features and Architectures. In: IP Cores Design from Specifications to Production. Analog Circuits and Signal Processing. Springer, Cham. https://doi.org/10.1007/978-3-319-22035-2_4
Download citation
DOI: https://doi.org/10.1007/978-3-319-22035-2_4
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-22034-5
Online ISBN: 978-3-319-22035-2
eBook Packages: EngineeringEngineering (R0)