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Applying Operations Research to Design for Test Insertion Problems

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Abstract

Enhancing electronic circuits with ad hoc testing circuitry—so-called Design for Test (DFT)—is a technique that enables one to thoroughly test circuits after production. But this insertion of new elements itself may sometimes be a challenge, for bad choices could lead to unacceptable degradations of features of the circuit, while good choices may help reduce testing costs and circuit production costs. This chapter demonstrates how methods from Operations Research—a scientific discipline rooted in both mathematics and computer science, leaning strongly on the formal modeling of optimization issues—help us adress such challenges and build efficient solutions leading to real-world solutions that may be integrated into electronic design software tools.

Keywords

Testing Time Travel Salesman Problem Memory Element Chip Testing Chip Production 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  1. 1.LCISUniversity Grenoble AlpesValenceFrance
  2. 2.CEA ListGif-sur-YvetteFrance

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