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Design Intelligence for Interconnection Realization in Power-Managed SoCs

Chapter

Abstract

In this chapter various intelligent techniques for modeling, design, automation, and management of on-chip interconnections in power-managed SoCs are described, including techniques that take into account various technological parameters such as crosstalk. Such intelligent techniques guarantee that the integrated interconnections, used in power-managed SoCs, are well-designed, energy-optimal, and meet the performance objectives in all the SoCs operating states.

Keywords

Men's Social Power Multiprocessor System-on-chip (MPSoC) Latency Objectives Valid Help Interconnect Design 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  1. 1.Department of ECEConcordia UniversityMontrealCanada
  2. 2.Department of EEEEcole Polytechnique de MontrealMontrealCanada

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