Abstract
This chapter collects recent advances in using convex optimization techniques to perform sizing of digital circuits. Convex optimization techniques provide an undeniably attractive promise: The attained solution is the best available. In order to use convex optimization techniques, the target optimization problem must be modeled using convex functions. The gate sizing problem has been modeled in different ways to enable the use of convex optimization techniques, such as linear programming and geometric programming. Statistical and robust sizing methods are included to reflect the importance of optimization techniques that are aware of variations. Applications of multi-objective optimization techniques that aid designers in evaluating the trade-offs are described.
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Rakai, L., Farshidi, A. (2015). Sizing Digital Circuits Using Convex Optimization Techniques. In: Fakhfakh, M., Tlelo-Cuautle, E., Siarry, P. (eds) Computational Intelligence in Digital and Network Designs and Applications. Springer, Cham. https://doi.org/10.1007/978-3-319-20071-2_1
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DOI: https://doi.org/10.1007/978-3-319-20071-2_1
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