Rectangle Placement for VLSI Testing

  • Merav Aharoni
  • Odellia BoniEmail author
  • Ari Freund
  • Lidor Goren
  • Wesam Ibraheem
  • Tamir Segev
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9075)


We report our solution to the problem of designing test-site chips. This is a specific variation of the VLSI floorplanning problem where rectangular macros must be placed without overlap in a given area, but no wiring between the macros exists. Typically, industrial problems of this type require placing hundreds of macros of different sizes and shapes and include additional constraints such as fixing or grouping some of the macros. Many tools and techniques developed to solve similar problems proved unsuitable for this specific variation. We used constraint programming (CP) with additional heuristics, including sophisticated variable and value orderings, to produce floorplans for real test-sites. Our CP solution is successfully used in production by test-site designers.


Floorplanning Electronic design automation Constraint programming Non overlapping rectangles placement 


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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  • Merav Aharoni
    • 1
  • Odellia Boni
    • 1
    Email author
  • Ari Freund
    • 2
  • Lidor Goren
    • 3
  • Wesam Ibraheem
    • 1
  • Tamir Segev
    • 1
  1. 1.IBM ResearchHaifaIsrael
  2. done while this author was at IBM ResearchHaifaIsrael
  3. 3.IBM STG - FishkillNew YorkUSA

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