Mobile Ecosystem Driven Dynamic Pipeline Adaptation for Low Power

  • Garo BournoutianEmail author
  • Alex Orailoglu
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9017)


State-of-the-art mobile smartphone and tablet processors are beginning to employ fully speculative, out-of-order architectures with deep instruction pipelines. These processors often have pipeline lengths of 24 or more stages. Furthermore, to improve high-performance ILP, these processors provide multiple parallel pipeline paths for various instruction types. These architectures provide multiple execution clusters defined by instruction type, each with its own issue queue. Instructions are dispatched to one of the appropriate issue queues, and all issue queues are then scanned in parallel to identify instructions ready for execution. The goal of such a resource-intensive architectural design is to sustain peak processor performance. Unfortunately, applications oftentimes only leverage a small subset of these robust computation resources, and the excess hardware resources still consume power while idle. This paper proposes a novel methodology that leverages the unique characteristics of the mobile ecosystem to drive hardware adaptation for a power-efficient execution pipeline microarchitecture. The proposed architecture will monitor the run-time execution behavior in order to enable only those pipeline resources that are currently needed, allowing the system to rapidly respond to changing resource demands to ensure performance is maintained while reducing power consumption. The simulation results show that processor performance is maintained while achieving a significant reduction in execution pipeline power consumption.


Mobile Low-power Dynamic Adaptive hardware Pipeline 


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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  1. 1.Qualcomm Technologies, Inc.San DiegoUSA
  2. 2.University of CaliforniaSan Diego, La JollaUSA

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